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Parallel algorithms/architectures for neural networks
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/j.1538-7305.1983.tb03114.xopenalex-snapshot
An Introduction to the Application of the Theory of Probabilistic Functions of a Markov Process to Automatic Speech Recognition
inferredcites →https://doi.org/10.1002/j.1538-7305.1984.tb00034.xopenalex-snapshot
On the Hidden Markov Model and Dynamic Time Warping for Speech Recognition-A Unified View
inferredcites →https://doi.org/10.1007/978-3-642-88163-3openalex-snapshot
Self-Organization and Associative Memory
inferredcites →https://doi.org/10.1007/bf00337288openalex-snapshot
Self-organized formation of topologically correct feature maps
inferredcites →https://doi.org/10.1007/bf00339943openalex-snapshot
“Neural” computation of decisions in optimization problems
inferredcites →https://doi.org/10.1007/bf00342633openalex-snapshot
Cognitron: A self-organizing multilayered neural network
inferredcites →https://doi.org/10.1007/bf00344251openalex-snapshot
Neocognitron: A self-organizing neural network model for a mechanism of pattern recognition unaffected by shift in position
inferredcites →https://doi.org/10.1007/bf00344744openalex-snapshot
Adaptive pattern classification and universal recoding: I. Parallel development and coding of neural feature detectors
inferredcites →https://doi.org/10.1007/bf02478259openalex-snapshot
A logical calculus of the ideas immanent in nervous activity
inferredcites →https://doi.org/10.1016/0004-3702(89)90049-0openalex-snapshot
Connectionist learning procedures
inferredcites →https://doi.org/10.1016/0025-5564(72)90075-2openalex-snapshot
A simple neural network generating an interactive memory
inferredcites →https://doi.org/10.1016/0743-7315(89)90065-8openalex-snapshot
A unified systolic architecture for artificial neural networks
inferredcites →https://doi.org/10.1016/s0364-0213(85)80010-0openalex-snapshot
Feature discovery by competitive learning
inferredcites →https://doi.org/10.1037//0096-3445.114.2.159openalex-snapshot
Distributed memory and the representation of general and specific information.
inferredcites →https://doi.org/10.1037/0096-3445.114.2.159openalex-snapshot
Distributed memory and the representation of general and specific information.
inferredcites →https://doi.org/10.1037/h0042519openalex-snapshot
The perceptron: A probabilistic model for information storage and organization in the brain.
inferredcites →https://doi.org/10.1049/ip-i-1.1981.0010openalex-snapshot
Introduction to V.L.S.I. Systems
inferredcites →https://doi.org/10.1073/pnas.79.8.2554openalex-snapshot
Neural networks and physical systems with emergent collective computational abilities.
inferredcites →https://doi.org/10.1073/pnas.81.10.3088openalex-snapshot
Neurons with graded response have collective computational properties like those of two-state neurons.
inferredcites →https://doi.org/10.1090/s0002-9904-1967-11751-8openalex-snapshot
An inequality with applications to statistical estimation for probabilistic functions of Markov processes and to a model for ecology
inferredcites →https://doi.org/10.1109/2.29openalex-snapshot
Neural nets for adaptive filtering and adaptive pattern recognition
inferredcites →https://doi.org/10.1109/2.36openalex-snapshot
Self-organization in a perceptual network
inferredcites →https://doi.org/10.1109/29.1640openalex-snapshot
Learned classification of sonar targets using a massively parallel network
inferredcites →https://doi.org/10.1109/icnn.1988.23868openalex-snapshot
An algebraic projection analysis for optimal hidden units size and learning rates in back-propagation learning
inferredcites →https://doi.org/10.1109/icnn.1988.23925openalex-snapshot
Parallel architectures for artificial neural nets
inferredcites →https://doi.org/10.1109/ijcnn.1989.118453openalex-snapshot
A universal digital VLSI design for neural networks
inferredcites →https://doi.org/10.1109/iscas.1989.100464openalex-snapshot
A unifying viewpoint of multilayer perceptrons and hidden Markov models
inferredcites →https://doi.org/10.1109/massp.1986.1165342openalex-snapshot
An introduction to hidden Markov models
inferredcites →https://doi.org/10.1109/massp.1987.1165576openalex-snapshot
An introduction to computing with neural nets
inferredcites →https://doi.org/10.1109/mc.1987.1663617openalex-snapshot
Wavefront Array Processors-Concept to Implementation
inferredcites →https://doi.org/10.1109/proc.1971.8087openalex-snapshot
Characteristics of randomly connected threshold-element networks and network systems
inferredcites →https://doi.org/10.1109/proc.1984.12944openalex-snapshot
On supercomputing with systolic/wavefront array processors
inferredcites →https://doi.org/10.1109/proc.1986.13535openalex-snapshot
Fault-tolerant matrix arithmetic and signal processing on highly concurrent computing structures
inferredcites →https://doi.org/10.1109/tc.1982.1675922openalex-snapshot
Wavefront Array Processor: Language, Architecture, and Applications
inferredcites →https://doi.org/10.1109/tcom.1974.1092295openalex-snapshot
Performance Evaluation of Reliability Improvement Techniques for Single-Loop Communications Systems
inferredcites →https://doi.org/10.1109/tsmc.1983.6313075openalex-snapshot
Absolute stability of global pattern formation and parallel memory storage by competitive neural networks
inferredcites →https://doi.org/10.1117/12.942747openalex-snapshot
Art 2: Self-Organization Of Stable Category Recognition Codes For Analog Input Patterns
inferredcites →https://doi.org/10.1207/s15516709cog0901_5openalex-snapshot
Feature Discovery by Competitive Learning*
inferredcites →https://doi.org/10.1207/s15516709cog0901_7openalex-snapshot
A Learning Algorithm for Boltzmann Machines*
inferredcites →https://doi.org/10.1214/aoms/1177697196openalex-snapshot
A Maximization Technique Occurring in the Statistical Analysis of Probabilistic Functions of Markov Chains
inferredcites →https://doi.org/10.1364/ao.26.004919openalex-snapshot
ART 2: self-organization of stable category recognition codes for analog input patterns
inferredcites →https://doi.org/10.21236/ada164453openalex-snapshot
Learning Internal Representations by Error Propagation
inferredcites →https://doi.org/10.2140/pjm.1968.27.211openalex-snapshot
Growth transformations for functions on manifolds
inferredcites →https://doi.org/10.2140/pjm.1972.43.765openalex-snapshot
Invariant functions of an iterative process for maximization of a polynomial
inferredcites →https://doi.org/10.25549/usctheses-c30-519670openalex-snapshot
Algorithms/applications/architectures of artificial neural nets
inferredcites →https://doi.org/10.7551/mitpress/4943.001.0001openalex-snapshot
Neurocomputing, Volume 1
inferredcites →https://doi.org/10.7551/mitpress/5236.001.0001openalex-snapshot
Parallel Distributed Processing
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1006/jpdc.2000.1665openalex-snapshot
Experimental Evaluation of Automatic Array Alignment in Parallelized Matlab
inferred← citeshttps://doi.org/10.1007/978-1-4615-4036-6_6openalex-snapshot
Control Generation in the Design of Processor Arrays
inferred← citeshttps://doi.org/10.1007/978-3-540-24669-5_79openalex-snapshot
Systolic Architectures for Soft Computing Algorithms
inferred← citeshttps://doi.org/10.1007/bf00927836openalex-snapshot
Control generation in the design of processor arrays
inferred← citeshttps://doi.org/10.1007/bf01581962openalex-snapshot
On partitioning and fault tolerance issues for neural array processors
inferred← citeshttps://doi.org/10.1007/bf02106451openalex-snapshot
Testing of programmable analog neural network chips
inferred← citeshttps://doi.org/10.1007/bf02107056openalex-snapshot
Tree-based special-purpose Array architectures for neural computing
inferred← citeshttps://doi.org/10.1007/bf02457822openalex-snapshot
Review of neural network applications in medical imaging and signal processing
inferred← citeshttps://doi.org/10.1016/0167-9260(93)90035-bopenalex-snapshot
Delay-insensitive multi-ring structures
inferred← citeshttps://doi.org/10.1049/ip-c.1992.0010openalex-snapshot
Towards static-security assessment of a large-scale power system using neural networks
inferred← citeshttps://doi.org/10.1080/10637199708915598openalex-snapshot
AN EFFICIENT MAPPING ALGORITHM OF MULTILAYER PERCEPTRON ON MESH-CONNECTED ARCHITECTURES
inferred← citeshttps://doi.org/10.1109/12.391184openalex-snapshot
Efficient mapping of ANNs on hypercube massively parallel machines
inferred← citeshttps://doi.org/10.1109/29.45543openalex-snapshot
A systolic neural network architecture for hidden Markov models
inferred← citeshttps://doi.org/10.1109/4.209997openalex-snapshot
Design and characterization of analog VLSI neural network modules
inferred← citeshttps://doi.org/10.1109/72.105429openalex-snapshot
Weight perturbation: an optimal architecture and learning technique for analog VLSI feedforward and recurrent multilayer networks
inferred← citeshttps://doi.org/10.1109/asap.1993.397156openalex-snapshot
An application-specific array architecture for feedforward with backpropagation ANNs
inferred← citeshttps://doi.org/10.1109/iscas.1991.176600openalex-snapshot
VLSI neurocomputing with analog programmable chips and digital systolic array chips
inferred← citeshttps://doi.org/10.1109/iscas.2004.1329929openalex-snapshot
Hopfield associative memory on mesh
inferred← citeshttps://doi.org/10.1109/mnnfs.1996.493816openalex-snapshot
PANNE: a parallel computing engine for connectionist simulation
inferred← citeshttps://doi.org/10.1109/mwscas.1994.519284openalex-snapshot
Design of digital accelerators for backpropagation
inferred← citeshttps://doi.org/10.1109/naecon.1997.618084openalex-snapshot
On embeddings of neural networks into massively parallel computer systems
inferred← citeshttps://doi.org/10.1109/nnsp.1993.471843openalex-snapshot
Analysis of coarse parallel architectures for artificial neural processing
inferred← citeshttps://doi.org/10.1109/spdp.1993.395509openalex-snapshot
An efficient mapping of multilayer perceptron with backpropagation ANNs on hypercubes
inferred← citeshttps://doi.org/10.1109/tpds.2003.1233715openalex-snapshot
Efficient mapping algorithm of multilayer neural network on torus architecture
inferred← citeshttps://doi.org/10.1155/2011/189368openalex-snapshot
An Optimal Implementation on FPGA of a Hopfield Neural Network
inferred← citeshttps://doi.org/10.1162/neco.1991.3.4.546openalex-snapshot
Weight Perturbation: An Optimal Architecture and Learning Technique for Analog VLSI Feedforward and Recurrent Multilayer Networks
inferred← citeshttps://doi.org/10.2514/1.31026openalex-snapshot
Scalable Massively Parallel Artificial Neural Networks
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