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A hardware implementation of pure ESTEREL
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-18317-5_15openalex-snapshot
SIGNAL: A declarative language for synchronous programming of real-time systems
inferredcites →https://doi.org/10.1007/3-540-52148-8_1openalex-snapshot
Process calculi, from theory to practice: Verification tools
inferredcites →https://doi.org/10.1007/978-1-4615-0292-0_4openalex-snapshot
A Unified Framework for the Formal Verification of Sequential Circuits
inferredcites →https://doi.org/10.1016/0167-6423(92)90005-vopenalex-snapshot
The Esterel synchronous programming language: design, semantics, implementation
inferredcites →https://doi.org/10.1016/0169-7552(91)90080-vopenalex-snapshot
Incremental development of an HDLC entity in Esterel
inferredcites →https://doi.org/10.1016/0304-3975(80)90028-6openalex-snapshot
An algebraic definition for control structures
inferredcites →https://doi.org/10.1109/5.97297openalex-snapshot
The synchronous approach to reactive and real-time systems
inferredcites →https://doi.org/10.1109/5.97298openalex-snapshot
A language for compositional specification and verification of finite state hardware controllers
inferredcites →https://doi.org/10.1109/5.97300openalex-snapshot
The synchronous data flow programming language LUSTRE
inferredcites →https://doi.org/10.1109/5.97301openalex-snapshot
Programming real-time applications with SIGNAL
inferredcites →https://doi.org/10.1109/iccad.1991.185319openalex-snapshot
Extracting local don't cares for network optimization
inferredcites →https://doi.org/10.1109/iccd.1990.130210openalex-snapshot
New ideas on symbolic manipulations of finite state machines
inferredcites →https://doi.org/10.1145/121956.121968openalex-snapshot
Hardware speedups in long integer multiplication
inferredcites →https://doi.org/10.1145/41625.41641openalex-snapshot
LUSTRE: a declarative language for real-time programming
inferredcites →https://doi.org/10.1145/97444.97679openalex-snapshot
Hardware speedups in long integer multiplication
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Platform-Independent Design for Embedded Real-Time Systems
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Integrating the Synchronous Paradigm into UML: Application to Control-Dominated Systems
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On the Combination of Synchronous Languages
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Programmable active memories: a performance assessment
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Control optimization and hardware translation of Esterel programs
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Modular Compilation of Synchronous Programs
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Dependency-Driven Distribution of Synchronous Programs
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The Semantics of Pure Esterel
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Quartz: A Synchronous Language for Model-Based Design of Reactive Embedded Systems
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Quartz: A Synchronous Language for Model-Based Design of Reactive Embedded Systems
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Representation of synchronous, asynchronous, and polychronous components by clocked guarded actions
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Programming Parallelism on FPGAs with Eclat
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Predictable real-time software synthesis
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From Formal Specifications to Simulations: Generating Executable Hardware Models for Early Validation
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The Synchronous Approach to Reactive and Real-Time Systems Manuscript received September 15, 1990; revised March 9, 1991. IEEE Log Number 9102298
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Clairvoyant: A Synthesis System for Production-Based Specification Manuscript received December 14, 1992; revised May 14, 1993 and October 15, 1993. This work was supported by Synopsys, Inc. and the California MICRO Program #92-019. IEEE Log Number 9400592.
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Constructive polychronous systems
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Formal modeling methodologies for control of manufacturing cells: Survey and comparison
inferred← citeshttps://doi.org/10.1016/s1571-0661(05)80442-6openalex-snapshot
ESUIF: An Open Esterel Compiler
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Formal Methods in Designing Embedded Systems—the SACRES Experience
inferred← citeshttps://doi.org/10.1049/ip-cdt:20045097openalex-snapshot
Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures
inferred← citeshttps://doi.org/10.1049/ip-cdt:20045098openalex-snapshot
Models of computation and languages for embedded system design
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Computing the initial states of retimed circuits
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Hierarchical finite state machines with multiple concurrency models
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Design of embedded systems: formal models, validation, and synthesis
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Clairvoyant: a synthesis system for production-based specification
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A Formal Semantics of Clock Refinement in Imperative Synchronous Languages
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Synchronous programming: introduction and application to industrial process control
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A Synchronous/Asynchronous Approach to Robot Programming
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Concurrent control systems: from Grafcet to VHDL
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A Structured Template for an Effcient Dependable System Design Using Model Driven Architecture and Spin Tool
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Causality analysis of synchronous programs with delayed actions
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Sequential Challenges in Synthesizing Esterel
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