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Towards a provably correct hardware implementation of occam

https://doi.org/10.1007/bfb0021726
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-1-4471-3494-7openalex-snapshot
Logic Program Synthesis and Transformation
inferredcites →https://doi.org/10.1007/978-1-4471-3501-2_10openalex-snapshot
From Programs to Object Code using Logic and Logic Programming
inferredcites →https://doi.org/10.1007/978-1-4471-3544-9_7openalex-snapshot
Towards Truly Delay-Insensitive Circuit Realizations of Process Algebras
inferredcites →https://doi.org/10.1007/978-3-642-55481-0openalex-snapshot
Programming in Prolog
inferredcites →https://doi.org/10.1007/978-94-009-0705-8_65openalex-snapshot
An Algebraic Approach to Verifiable Compiling Specification and Prototyping of the Procos Level 0 Programming Language
inferredcites →https://doi.org/10.1007/bf01191809openalex-snapshot
Normal form approach to compiler design
inferredcites →https://doi.org/10.1016/0304-3975(88)90049-7openalex-snapshot
The laws of OCCAM programming
inferredcites →https://doi.org/10.1016/b978-0-08-041893-3.50020-3openalex-snapshot
FORMAL METHODS AND SOFTWARE SAFETY
inferredcites →https://doi.org/10.1016/s1474-6670(17)49413-4openalex-snapshot
Formal Methods and Software Safety
inferredcites →https://doi.org/10.1049/sej.1987.0028openalex-snapshot
Occam as a hardware description language
inferredcites →https://doi.org/10.1093/comjnl/34.1.64openalex-snapshot
Prolog in Practical Compiler Writing
inferredcites →https://doi.org/10.1109/edac.1991.206431openalex-snapshot
The VLSI-programming language Tangram and its translation into handshake circuits
inferredcites →https://doi.org/10.1109/emwrt.1992.637480openalex-snapshot
Time interval semantics and implementation of a real-time programming language
inferredcites →https://doi.org/10.1109/emwrt.1993.639088openalex-snapshot
Developing Correct Systems
inferredcites →https://doi.org/10.5555/951513.951597openalex-snapshot
The VLSI-programming language Tangram and its translation into handshake circuits
inferredcites →https://doi.org/10.7907/zmy86-a1w29openalex-snapshot
Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/3-540-44614-1_75openalex-snapshot
Behavioural Language Compilation with Virtual Hardware Management
inferred← citeshttps://doi.org/10.1007/3-540-44798-9_19openalex-snapshot
Towards Provably-Correct Hardware Compilation Tools Based on Pass Separation Techniques
inferred← citeshttps://doi.org/10.1007/3-540-45251-6_19openalex-snapshot
Serialising Parallel Processes in a Hardware/Software Partitioning Context
inferred← citeshttps://doi.org/10.1007/3-540-48092-7_12openalex-snapshot
Compilation and Synthesis for Real-Time Embedded Controllers
inferred← citeshttps://doi.org/10.1007/3-540-49253-4_23openalex-snapshot
An Algebraic Approach to Combining Processes in a Hardware/Software Partitioning Environment
inferred← citeshttps://doi.org/10.1007/3-540-58468-4_171openalex-snapshot
Provably Correct Systems
inferred← citeshttps://doi.org/10.1007/3-540-58468-4_172openalex-snapshot
Simulation approach to provably correct hardware compilation
inferred← citeshttps://doi.org/10.1007/3-540-58555-9_91openalex-snapshot
Seven more myths of formal methods: Dispelling industrial prejudices
inferred← citeshttps://doi.org/10.1007/3-540-60294-1_104openalex-snapshot
Using reconfigurable hardware to speed up product development and performance
inferred← citeshttps://doi.org/10.1007/3-540-63533-5_33openalex-snapshot
A normal form reduction strategy for hardware/software partitioning
inferred← citeshttps://doi.org/10.1007/978-0-387-35578-8_18openalex-snapshot
Provably Correct Hardware Compilation Using Timing Diagrams
inferred← citeshttps://doi.org/10.1007/978-1-4471-0851-1_1openalex-snapshot
A Common Framework for Mixed Hardware/Software Systems
inferred← citeshttps://doi.org/10.1007/978-3-031-40436-8_1openalex-snapshot
Jifeng He at Oxford and Beyond: An Appreciation
inferred← citeshttps://doi.org/10.1007/978-3-540-40007-3_5openalex-snapshot
An Algebraic Approach to the VERILOG Programming
inferred← citeshttps://doi.org/10.1007/978-3-540-73210-5openalex-snapshot
Integrated formal methods : 6th International Conference, IFM 2007, Oxford, UK, July 2-5, 2007 : proceedings
inferred← citeshttps://doi.org/10.1007/978-3-540-73210-5_5openalex-snapshot
Slotted-Circus
inferred← citeshttps://doi.org/10.1007/978-3-642-39698-4_24openalex-snapshot
Towards a Modeling Language for Cyber-Physical Systems
inferred← citeshttps://doi.org/10.1007/978-3-642-39698-4_4openalex-snapshot
A Relational Approach to an Algebraic Community: From Paul Erdős to He Jifeng
inferred← citeshttps://doi.org/10.1007/bf00133305openalex-snapshot
Co-synthesis and co-simulation of control-dominated embedded systems
inferred← citeshttps://doi.org/10.1007/bf00936948openalex-snapshot
Constructing hardware-software systems from a single description
inferred← citeshttps://doi.org/10.1007/bf01211459openalex-snapshot
Verified compilation of communicating processes into clocked circuits
inferred← citeshttps://doi.org/10.1007/bf03259390openalex-snapshot
Specification, Verification and Prototyping of an Optimized Compiler
inferred← citeshttps://doi.org/10.1007/s00236-011-0142-yopenalex-snapshot
Correct hardware synthesis
inferred← citeshttps://doi.org/10.1007/s002360050154openalex-snapshot
Transformational design of real-time systems. Part II: From program specifications to programs
inferred← citeshttps://doi.org/10.1007/s10766-007-0046-1openalex-snapshot
Parallel Algorithms Development for Programmable Devices with Application from Cryptography
inferred← citeshttps://doi.org/10.1016/0141-9331(95)01076-9openalex-snapshot
Reconfigurable processor architectures
inferred← citeshttps://doi.org/10.1016/b978-155860702-6/50036-3openalex-snapshot
Co-synthesis and Co-simulation of Control-Dominated Embedded Systems
inferred← citeshttps://doi.org/10.1023/a:1011184310224openalex-snapshot
An Approach to the Specification and Verification of a Hardware Compilation Scheme
inferred← citeshttps://doi.org/10.1023/b:form.0000004787.52329.98openalex-snapshot
A Constructive Approach to Hardware/Software Partitioning
inferred← citeshttps://doi.org/10.1049/ip-cdt:20010579openalex-snapshot
Hardware compiler realising concurrent processes in reconfigurable logic
inferred← citeshttps://doi.org/10.1049/sej.1993.0025openalex-snapshot
Safety-critical systems, formal methods and standards
inferred← citeshttps://doi.org/10.1109/date.1998.655858openalex-snapshot
A model for system-level timed analysis and profiling
inferred← citeshttps://doi.org/10.1109/emwrt.1993.639088openalex-snapshot
Developing Correct Systems
inferred← citeshttps://doi.org/10.1109/hcs.1996.492227openalex-snapshot
Partitioning and exploration strategies in the TOSCA co-design flow
inferred← citeshttps://doi.org/10.1109/hsc.1997.584588openalex-snapshot
A flexible model for evaluating the behavior of hardware/software systems
inferred← citeshttps://doi.org/10.1109/isss.1996.565883openalex-snapshot
The use of a virtual instruction set for the software synthesis of Hw/Sw embedded systems
inferred← citeshttps://doi.org/10.1145/3803555openalex-snapshot
Experiences from the European ProCoS Projects: Provably Correct Systems
inferred← citeshttps://doi.org/10.14236/ewic/dcc1996.3openalex-snapshot
Deriving Two-Phase Modules for a Multi-Target Hardware Compiler
inferred← citeshttps://doi.org/10.3233/ica-1998-5104openalex-snapshot
Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach
inferred← citeshttps://doi.org/10.5555/524431.857936openalex-snapshot
The use of a virtual instruction set for the software synthesis of Hw/Sw embedded systems
inferred← citeshttps://doi.org/10.5555/792767.793473openalex-snapshot
Partitioning and exploration strategies in the TOSCA co-design flow
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