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Mutation scheduling: A unified approach to compiling for fine-grain parallelism
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/32.54294openalex-snapshot
Region scheduling: an approach for detecting and redistributing parallelism
inferredcites →https://doi.org/10.1109/71.127258openalex-snapshot
Automatic extraction of functional parallelism from ordinary programs
inferredcites →https://doi.org/10.1109/icpp.1993.181openalex-snapshot
Trailblazing: A Hierarchical Approach to Percolation Scheduling
inferredcites →https://doi.org/10.1109/micro.1990.151427openalex-snapshot
Using a lookahead window in a compaction-based parallelizing compiler
inferredcites →https://doi.org/10.1109/t-c.1972.223501openalex-snapshot
On the Number of Operations Simultaneously Executable in Fortran-Like Programs and Their Resulting Speedup
inferredcites →https://doi.org/10.1145/1067649.801721openalex-snapshot
Efficient code generation for horizontal architectures
inferredcites →https://doi.org/10.1145/106972.106986openalex-snapshot
Integrating register allocation and instruction scheduling for RISCs
inferredcites →https://doi.org/10.1145/1096503.1096504openalex-snapshot
Using a lookahead window in a compaction-based parallelizing compiler
inferredcites →https://doi.org/10.1145/115372.115320openalex-snapshot
Efficiently computing static single assignment form and the control dependence graph
inferredcites →https://doi.org/10.1145/127601.127767openalex-snapshot
Incremental tree height reduction for high level synthesis
inferredcites →https://doi.org/10.1145/144965.145000openalex-snapshot
An efficient resource-constrained global scheduling technique for superscalar and VLIW processors
inferredcites →https://doi.org/10.1145/2591635.2667158openalex-snapshot
Code scheduling and register allocation in large basic blocks
inferredcites →https://doi.org/10.1145/36205.36194openalex-snapshot
Superoptimizer: a look at the smallest program
inferredcites →https://doi.org/10.1145/55364.55407openalex-snapshot
Code scheduling and register allocation in large basic blocks
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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PROPAN: A Retargetable System for Postpass Optimisations and Analyses
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Customizing Software Toolkits for Embedded Systems-on-Chip
inferred← citeshttps://doi.org/10.1007/978-3-642-58322-3_17openalex-snapshot
PROPAN: Ein retargierbares System für Postpassoptimierungen und -analysen
inferred← citeshttps://doi.org/10.1007/bfb0014206openalex-snapshot
A simple mechanism for improving the accuracy and efficiency of instruction-level disambiguation
inferred← citeshttps://doi.org/10.1007/bfb0017254openalex-snapshot
Integrating program optimizations and transformations with the scheduling of instruction level parallelism
inferred← citeshttps://doi.org/10.1007/bfb0024215openalex-snapshot
Achieving multi-level parallelization
inferred← citeshttps://doi.org/10.1023/a:1008966522714openalex-snapshot
Phase-Coupled Mapping of Data Flow Graphs to Irregular Data Paths
inferred← citeshttps://doi.org/10.1023/a:1018738112639openalex-snapshot
Experiences with Cooperating Register Allocation and Instruction Scheduling
inferred← citeshttps://doi.org/10.1109/aspdac.2001.913342openalex-snapshot
New directions in compiler technology for embedded systems
inferred← citeshttps://doi.org/10.1109/date.2004.1269070openalex-snapshot
Phase coupled code generation for DSPs using a genetic algorithm
inferred← citeshttps://doi.org/10.1109/hipc.1997.634517openalex-snapshot
Code optimization as a side effect of instruction scheduling
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Integrating Program Transformations In The Memory-based Synthesis Of Image And Video Algorithms
inferred← citeshttps://doi.org/10.1109/pact.1996.552637openalex-snapshot
An efficient, global resource-directed approach to exploiting instruction-level parallelism
inferred← citeshttps://doi.org/10.1109/pact.1997.644008openalex-snapshot
The PROMIS compiler prototype
inferred← citeshttps://doi.org/10.1109/pact.1999.807420openalex-snapshot
Evaluating register allocation and instruction scheduling techniques in out-of-order issue processors
inferred← citeshttps://doi.org/10.1145/1027084.1027087openalex-snapshot
Coordinated parallelizing compiler optimizations and high-level synthesis
inferred← citeshttps://doi.org/10.1145/370155.370429openalex-snapshot
New directions in compiler technology for embedded systems (embedded tutorial)
inferred← citeshttps://doi.org/10.1145/384196.384219openalex-snapshot
A Dynamic Programming Approach to Optimal Integrated Code Generation
inferred← citeshttps://doi.org/10.1145/581199.581256openalex-snapshot
Dynamic common sub-expression elimination during scheduling in high-level synthesis
inferred← citeshttps://doi.org/10.1155/2014/619608openalex-snapshot
Effort at Constructing Big Data Sensor Networks for Monitoring Greenhouse Gas Emission
inferred← citeshttps://doi.org/10.5555/191326.191343openalex-snapshot
Integrating program transformations in the memory-based synthesis of image and video algorithms
inferred← citeshttps://doi.org/10.5555/968879.969147openalex-snapshot
Phase coupled code generation for DSPs using a genetic algorithm
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