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Model checking of real-time reachability properties using abstractions
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1006/inco.1994.1045openalex-snapshot
Symbolic Model Checking for Real-Time Systems
inferredcites →https://doi.org/10.1007/3-540-52148-8_17openalex-snapshot
Timing assumptions and verification of finite-state concurrent systems
inferredcites →https://doi.org/10.1007/3-540-56922-7_28openalex-snapshot
Delay analysis in synchronous programs
inferredcites →https://doi.org/10.1007/3-540-61042-1_53openalex-snapshot
Extending promela and spin for real time
inferredcites →https://doi.org/10.1007/3-540-63166-6_19openalex-snapshot
Some progress in the symbolic verification of timed automata
inferredcites →https://doi.org/10.1007/bf01384313openalex-snapshot
Property preserving abstractions for the verification of concurrent systems
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A compositional proof of a real-time mutual exclusion protocol
inferredcites →https://doi.org/10.1007/bfb0054179openalex-snapshot
Verifying networks of timed processes
inferredcites →https://doi.org/10.1007/bfb0054180openalex-snapshot
Model checking of real-time reachability properties using abstractions
inferredcites →https://doi.org/10.1109/real.1995.495198openalex-snapshot
Compositional and symbolic model-checking of real-time systems
inferredcites →https://doi.org/10.1109/real.1996.563700openalex-snapshot
Approximate reachability analysis of timed automata
inferredcites →https://doi.org/10.1109/real.1996.563702openalex-snapshot
Reducing the number of clock variables of timed automata
inferredcites →https://doi.org/10.1109/real.1997.641265openalex-snapshot
Efficient verification of real-time systems: compact data structure and state-space reduction
inferredcites →https://doi.org/10.1109/real.1997.641266openalex-snapshot
On-the-fly symbolic model checking for real-time systems
inferredcites →https://doi.org/10.1142/9789812831583_0007openalex-snapshot
Approximations for verifying timing properties
inferredcites →https://doi.org/10.1145/185595.1017037openalex-snapshot
Book Review: FDDI Handbook: High Speed Networking Using Fiber And Other Media, by Raj Jain (Addison-Wesley 1994)
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Verification of Real‐Time Probabilistic Systems
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Verification of timed automata : reachability, liveness and modelling
inferred← citeshttps://doi.org/10.70675/567c7296z07f4z4fbfz83d4z7d92e3f3e650openalex-snapshot
Efficient Parametric Verification of Parametric Timed Automata
inferred← citeshttps://doi.org/10.70675/e460bd40z776cz4d9cz9f52zf1e672510f2bopenalex-snapshot
Analyse d’accessibilité et révision de la dynamique dans les réseaux de régulations biologiques
inferred← citeshttps://doi.org/10.70675/f5fc5032zc27dz4fffza3cbzd9a01566f10dopenalex-snapshot
Partial order reduction for timed systems
inferred← citeshttps://doi.org/10.7146/brics.v7i37.20203openalex-snapshot
Guided Synthesis of Control Programs for a Batch Plant using UPPAAL
inferred← citeshttps://doi.org/10.7146/brics.v9i35.21750openalex-snapshot
Timed Automata May Cause Some Troubles
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