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TERO-Based Detection of Hardware Trojans on FPGA Implementation of the AES Algorithm

https://doi.org/10.1109/dsd.2016.47

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-45682-1_15openalex-snapshot

A Compact Rijndael Hardware Architecture with S-Box Optimization

inferredcites →https://doi.org/10.1007/978-3-540-74735-2_5openalex-snapshot

FPGA Intrinsic PUFs and Their Use for IP Protection

inferredcites →https://doi.org/10.1007/978-3-642-15031-9_24openalex-snapshot

New High Entropy Element for FPGA Based True Random Number Generators

inferredcites →https://doi.org/10.1109/dsd.2014.74openalex-snapshot

FPGA Trojan Detection Using Length-Optimized Ring Oscillators

inferredcites →https://doi.org/10.1109/dsd.2015.32openalex-snapshot

A Comparison of TERO and RO Timing Sensitivity for Hardware Trojan Detection Applications

inferredcites →https://doi.org/10.1109/hst.2010.5513108openalex-snapshot

A large scale characterization of RO-PUF

inferredcites →https://doi.org/10.1109/iccd.2011.6081411openalex-snapshot

Circumventing a ring oscillator approach to FPGA-based hardware Trojan detection

inferredcites →https://doi.org/10.1109/mc.2010.299openalex-snapshot

Trustworthy Hardware: Identifying and Classifying Hardware Trojans

inferredcites →https://doi.org/10.1109/tetc.2013.2287182openalex-snapshot

A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon

inferredcites →https://doi.org/10.1109/vts.2011.5783766openalex-snapshot

Design and analysis of ring oscillator based Design-for-Trust technique

inferredcites →https://doi.org/10.1145/1278480.1278484openalex-snapshot

Physical unclonable functions for device authentication and secret key generation

inferredcites →https://doi.org/10.1145/2429384.2429392openalex-snapshot

Experimental analysis of a ring oscillator network for hardware trojan detection in a 90nm ASIC

inferredcites →https://doi.org/10.1145/2491677openalex-snapshot

Detection of trojans using a combined ring oscillator network and off-chip transient power analysis

inferredcites →https://doi.org/10.1145/2591513.2591520openalex-snapshot

Hardware trojan attacks in FPGA devices

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/s41635-018-0042-5openalex-snapshot

A Hardware Trojan Attack on FPGA-Based Cryptographic Key Generation: Impact and Detection

inferred← citeshttps://doi.org/10.1007/s41635-020-00107-9openalex-snapshot

Probabilistic Hardware Trojan Attacks on Multiple Layers of Reconfigurable Network Infrastructure

inferred← citeshttps://doi.org/10.1016/j.micpro.2017.09.001openalex-snapshot

On the effects of ring oscillator length and hardware Trojan size on an FPGA-based implementation of AES

inferred← citeshttps://doi.org/10.1109/icces51350.2021.9488935openalex-snapshot

Hardware Trojan Detection using Ring Oscillator

inferred← citeshttps://doi.org/10.1109/iccke48569.2019.8964879openalex-snapshot

An Effective Application of Obfuscated TMR to Tackle Hardware Trojans

inferred← citeshttps://doi.org/10.1109/iceei47359.2019.8988803openalex-snapshot

Hardware Trojan Design and Its Detection using Side-Channel Analysis on Cryptographic Hardware AES Implemented on FPGA

inferred← citeshttps://doi.org/10.1109/icfpt59805.2023.00021openalex-snapshot

Assuring Netlist-to-Bitstream Equivalence using Physical Netlist Generation and Structural Comparison

inferred← citeshttps://doi.org/10.1109/ivsw.2018.8494874openalex-snapshot

Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs

inferred← citeshttps://doi.org/10.1145/3003733.3003808openalex-snapshot

An Efficient Reconfigurable Ring Oscillator for Hardware Trojan Detection

inferred← citeshttps://doi.org/10.1145/3491233openalex-snapshot

Approaches for FPGA Design Assurance

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