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An empirical study on the vectorization of multimedia applications for multimedia extensions

https://doi.org/10.1109/ipdps.2005.94

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

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Compiling for SIMD Within a Register

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Design and characterization of the Berkeley multimedia workload

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A comparative study of automatic vectorizing compilers

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Compilation Techniques for Multimedia Processors

inferredcites →https://doi.org/10.1023/a:1007559022013openalex-snapshot

A Vectorizing Compiler for Multimedia Extensions

inferredcites →https://doi.org/10.1023/a:1014230429447openalex-snapshot

Automatic Intra-Register Vectorization for the Intel® Architecture

inferredcites →https://doi.org/10.1109/2.612247openalex-snapshot

How multimedia workloads will change processor design

inferredcites →https://doi.org/10.1109/4.641681openalex-snapshot

Multimedia extensions for a 550-MHz RISC microprocessor

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AMD 3DNow! technology: architecture and implementations

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Efficient SIMD Code Generation for Runtime Alignment and Length Conversion

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Superword-Level Parallelism in the Presence of Control Flow

inferredcites →https://doi.org/10.1109/cmpcon.1995.512423openalex-snapshot

The visual instruction set (VIS) in UltraSPARC

inferredcites →https://doi.org/10.1109/ipdps.2002.1015494openalex-snapshot

A SIMD vectorizing compiler for digital signal processing algorithms

inferredcites →https://doi.org/10.1109/mc.1974.6323440openalex-snapshot

Measurements of parallelism in ordinary FORTRAN programs

inferredcites →https://doi.org/10.1109/micro.1997.645830openalex-snapshot

MediaBench: a tool for evaluating and synthesizing multimedia and communications systems

inferredcites →https://doi.org/10.1109/pact.2002.1105970openalex-snapshot

Increasing and detecting memory address congruence

inferredcites →https://doi.org/10.1109/superc.1988.44642openalex-snapshot

Vectorizing compilers: a test suite and results

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Mapping of application software to the multimedia instructions of general-purpose microprocessors

inferredcites →https://doi.org/10.1145/1064978.1065048openalex-snapshot

Formal loop merging for signal transforms

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Automatic translation of FORTRAN programs to vector form

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Parallel Prefix Computation

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Exploiting superword level parallelism with multimedia instruction sets

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Exploiting superword level parallelism with multimedia instruction sets

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Monotonic evolution

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Array recovery and high-level transformations for DSP applications

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Advanced compiler optimizations for supercomputers

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Vectorization for SIMD architectures with alignment constraints

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The range test: a dependence test for symbolic, non-linear expressions

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Vectorizing compilers: a test suite and results

inferredcites →https://doi.org/10.5555/645989.674329openalex-snapshot

Increasing and detecting memory address congruence

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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New Algorithms for SIMD Alignment

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Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors

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Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit

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A Review of SIMD Multimedia Extensions and their Usage in Scientific and Engineering Applications

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Efficient SIMD Code Generation for Runtime Alignment and Length Conversion

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Video SIMDBench: Benchmarking the Compiler Vectorization for Multimedia Applications

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Speculative dynamic vectorization to assist static vectorization in a HW/SW co-designed environment

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Performance evaluation of the Intel Xeon Phi manycore architecture using parallel video-based driver assistance algorithms

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Performance Evaluation of an SIMD Architecture with a Multi-bank Vector Memory Unit

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Optimizing data permutations for SIMD devices

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Auto-vectorization of interleaved data for SIMD

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Optimizing data permutations for SIMD devices

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Auto-vectorization of interleaved data for SIMD

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Vector LLVA

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Vectorization for SIMD architectures with alignment constraints

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Contributions to the GNU Compiler Collection

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Evaluation and enhancement of memory efficiency targeting general-purpose computations on scalable data-parallel GPU architectures

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AUXÍLIO A PORTABILIDADE DE CÓDIGO EM APLICAÇÕES DE ALTO DESEMPENHO

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SIMD code generation in data-parallel programming

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