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WATS: Workload-Aware Task Scheduling in Asymmetric Multi-core Architectures
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1006/jpdc.1996.0107openalex-snapshot
Cilk: An Efficient Multithreaded Runtime System
inferredcites →https://doi.org/10.1007/bfb0031628openalex-snapshot
Heuristics for 1D rectilinear partitioning as a low cost and high quality answer to dynamic load balancing
inferredcites →https://doi.org/10.1007/s10586-006-9747-2openalex-snapshot
A taxonomy of application scheduling tools for high performance cluster computing
inferredcites →https://doi.org/10.1007/s11227-011-0682-5openalex-snapshot
HAT: history-based auto-tuning MapReduce in heterogeneous environments
inferredcites →https://doi.org/10.1109/icpp.2011.32openalex-snapshot
CAB: Cache Aware Bi-tier Task-Stealing in Multi-socket Multi-core Architecture
inferredcites →https://doi.org/10.1109/ipdps.2006.1639374openalex-snapshot
Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors
inferredcites →https://doi.org/10.1109/ipdps.2006.1639376openalex-snapshot
Compatible phase co-scheduling on a CMP of multi-threaded processors
inferredcites →https://doi.org/10.1109/ipdps.2009.5161079openalex-snapshot
Work-first and help-first scheduling policies for async-finish task parallelism
inferredcites →https://doi.org/10.1109/ipdps.2010.5470370openalex-snapshot
Toward understanding heterogeneity in computing
inferredcites →https://doi.org/10.1109/ipdps.2010.5470425openalex-snapshot
SLAW: A scalable locality-aware adaptive work-stealing scheduler
inferredcites →https://doi.org/10.1109/ipdps.2011.103openalex-snapshot
X10 as a Parallel Language for Scientific Computation: Practice and Experience
inferredcites →https://doi.org/10.1109/ipdps.2011.105openalex-snapshot
Communication Optimizations for Distributed-Memory X10 Programs
inferredcites →https://doi.org/10.1109/isca.2004.1310764openalex-snapshot
Single-ISA heterogeneous multi-core architectures for multithreaded workload performance
inferredcites →https://doi.org/10.1109/isca.2005.51openalex-snapshot
The Impact of Performance Asymmetry in Emerging Multicore Architectures
inferredcites →https://doi.org/10.1109/mc.2005.379openalex-snapshot
Heterogeneous chip multiprocessors
inferredcites →https://doi.org/10.1109/mc.2008.209openalex-snapshot
Amdahl's Law in the Multicore Era
inferredcites →https://doi.org/10.1109/micro.2003.1253185openalex-snapshot
Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction
inferredcites →https://doi.org/10.1109/paap.2010.50openalex-snapshot
Scheduling Multiple Multithreaded Applications on Asymmetric and Symmetric Chip Multiprocessors
inferredcites →https://doi.org/10.1137/0217033openalex-snapshot
A Polynomial Approximation Scheme for Scheduling on Uniform Processors: Using the Dual Approximation Approach
inferredcites →https://doi.org/10.1145/1028176.1006707openalex-snapshot
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
inferredcites →https://doi.org/10.1145/1080695.1070012openalex-snapshot
The Impact of Performance Asymmetry in Emerging Multicore Architectures
inferredcites →https://doi.org/10.1145/1362622.1362694openalex-snapshot
Efficient operating system scheduling for performance-asymmetric multi-core architectures
inferredcites →https://doi.org/10.1145/1508244.1508274openalex-snapshot
Accelerating critical section execution with asymmetric multi-core architectures
inferredcites →https://doi.org/10.1145/1629911.1630048openalex-snapshot
The Cilk++ concurrency platform
inferredcites →https://doi.org/10.1145/1639949.1640106openalex-snapshot
The design of a task parallel library
inferredcites →https://doi.org/10.1145/1654059.1654085openalex-snapshot
Age based scheduling for asymmetric multiprocessors
inferredcites →https://doi.org/10.1145/1755913.1755928openalex-snapshot
Bias scheduling in heterogeneous multi-core architectures
inferredcites →https://doi.org/10.1145/1785481.1785573openalex-snapshot
A self-adaptive scheduler for asymmetric multi-cores
inferredcites →https://doi.org/10.1145/1810085.1810113openalex-snapshot
An approach to resource-aware co-scheduling for CMPs
inferredcites →https://doi.org/10.1145/1941553.1941582openalex-snapshot
Lifeline-based global load balancing
inferredcites →https://doi.org/10.1145/277650.277725openalex-snapshot
The implementation of the Cilk-5 multithreaded language
inferredcites →https://doi.org/10.1145/324133.324234openalex-snapshot
Scheduling multithreaded computations by work stealing
inferredcites →https://doi.org/10.1145/341800.341803openalex-snapshot
Scheduling Cilk multithreaded parallel programs on processors of different speeds
inferredcites →https://doi.org/10.1287/mnsc.34.3.391openalex-snapshot
The Shifting Bottleneck Procedure for Job Shop Scheduling
inferredcites →https://doi.org/10.5555/1352079.1352134openalex-snapshot
Intel threading building blocks
inferredcites →https://doi.org/10.5555/1898953.1899072openalex-snapshot
Compatible phase co-scheduling on a CMP of multi-threaded processors
inferredcites →https://doi.org/10.7551/mitpress/9486.003.0016openalex-snapshot
Intel Threading Building Blocks
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.3619openalex-snapshot
Adaptive demand‐aware work‐stealing in multi‐programmed multi‐core architectures
inferred← citeshttps://doi.org/10.1002/cpe.5170openalex-snapshot
A comprehensive performance evaluation of the BinLPT workload‐aware loop scheduler
inferred← citeshttps://doi.org/10.1007/978-3-642-40820-5_22openalex-snapshot
Asymmetry-Aware Scheduling in Heterogeneous Multi-core Architectures
inferred← citeshttps://doi.org/10.1007/978-981-10-6238-4_4openalex-snapshot
Work-Stealing for NUMA-enabled Architecture
inferred← citeshttps://doi.org/10.1007/s00607-013-0358-5openalex-snapshot
Decentralized task scheduling for a fixed priority multicore embedded RTOS
inferred← citeshttps://doi.org/10.1007/s11704-021-0418-5openalex-snapshot
Kronos: towards bus contention-aware job scheduling in warehouse scale computers
inferred← citeshttps://doi.org/10.1016/j.parco.2013.11.003openalex-snapshot
CPU + GPU scheduling with asymptotic profiling
inferred← citeshttps://doi.org/10.1109/access.2021.3077539openalex-snapshot
Migration in Hardware Transactional Memory on Asymmetric Multiprocessor
inferred← citeshttps://doi.org/10.1109/cluster.2015.65openalex-snapshot
On the Application Task Granularity and the Interplay with the Scheduling Overhead in Many-Core Shared Memory Systems
inferred← citeshttps://doi.org/10.1109/compcomm.2018.8780697openalex-snapshot
Energy-Efficient Phase-Aware Load Balancing on Asymmetric Multicore Processors
inferred← citeshttps://doi.org/10.1109/hpcc-smartcity-dss.2016.0027openalex-snapshot
SAWS: Selective Asymmetry-Aware Work-Stealing for Asymmetric Multi-core Architectures
inferred← citeshttps://doi.org/10.1109/iccc51575.2020.9345083openalex-snapshot
IDEC: Intelligent Distributed Edge Computing System Architecture Enabling Deep Learning across Heterogeneous IoT Devices
inferred← citeshttps://doi.org/10.1109/icces.2018.8639212openalex-snapshot
Dynamic Thread Mapping for Maximizing Performance in Power-Efficient Multi-core Systems
inferred← citeshttps://doi.org/10.1109/icdh.2014.71openalex-snapshot
Efficient Scheduling Mechanism for Performance-Heterogeneous Multi-core Processor
inferred← citeshttps://doi.org/10.1109/ipdpsw.2014.75openalex-snapshot
EEWA: Energy-Efficient Workload-Aware Task Scheduling in Multi-core Architectures
inferred← citeshttps://doi.org/10.1109/isca.2016.14openalex-snapshot
Asymmetry-Aware Work-Stealing Runtimes
inferred← citeshttps://doi.org/10.1109/isca59077.2024.00052openalex-snapshot
NDPBridge: Enabling Cross-Bank Coordination in Near-DRAM-Bank Processing Architectures
inferred← citeshttps://doi.org/10.1109/tc.2017.2783932openalex-snapshot
Contention and Locality-Aware Work-Stealing for Iterative Applications in Multi-Socket Computers
inferred← citeshttps://doi.org/10.1109/tpds.2014.2356194openalex-snapshot
Optimizing Task and Data Assignment on Multi-Core Systems with Multi-Port SPMs
inferred← citeshttps://doi.org/10.1145/2579674openalex-snapshot
Adaptive workload-aware task scheduling for single-ISA asymmetric multicore architectures
inferred← citeshttps://doi.org/10.1145/2766450openalex-snapshot
Locality-Aware Work Stealing Based on Online Profiling and Auto-Tuning for Multisocket Multicore Architectures
inferred← citeshttps://doi.org/10.1145/3007787.3001142openalex-snapshot
Asymmetry-aware work-stealing runtimes
inferred← citeshttps://doi.org/10.1145/3291058openalex-snapshot
Bandwidth and Locality Aware Task-stealing for Manycore Architectures with Bandwidth-Asymmetric Memory
inferred← citeshttps://doi.org/10.1145/3440054.3440065openalex-snapshot
ICTA: Intelligent Computing Task Allocation for Efficient Deep Learning in Distributed Edge Computing System of IoT
inferred← citeshttps://doi.org/10.1145/3510422openalex-snapshot
ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes
inferred← citeshttps://doi.org/10.14569/ijacsa.2016.070666openalex-snapshot
Scheduling on Heterogeneous Multi-core Processors Using Stable Matching Algorithm
inferred← citeshttps://doi.org/10.1587/elex.11.20140324openalex-snapshot
Recovery-enhancing task scheduling for multicore processors under NBTI impact
inferred← citeshttps://doi.org/10.26599/bdma.2018.9020020openalex-snapshot
QoE-driven big data management in pervasive edge computing environment
inferred← citeshttps://doi.org/10.2991/icssr-13.2013.153openalex-snapshot
A DEA-GA multi-objective scheduling algorithm for Chip-Multiprocessor
inferred← citeshttps://doi.org/10.46254/an11.20210427openalex-snapshot
A Reactive Scheduler for Closed Loop Control Systems Using Historical Run-time Statistics
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