On the public citation graph

Communication-Based Mapping Using Shared Pages

https://doi.org/10.1109/ipdps.2013.57

0 signed · 46 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.

Claim with ORCID

Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.

See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/hpcc.2010.114openalex-snapshot

Evaluating Thread Placement Based on Memory Access Patterns for Multi-core Processors

inferredcites →https://doi.org/10.1109/iiswc.2008.4636090openalex-snapshot

PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors

inferredcites →https://doi.org/10.1109/iiswc.2009.5306792openalex-snapshot

A communication characterisation of Splash-2 and Parsec

inferredcites →https://doi.org/10.1109/ipdps.2010.5470442openalex-snapshot

Structuring the execution of OpenMP applications for multicore architectures

inferredcites →https://doi.org/10.1109/ipdps.2012.56openalex-snapshot

Using the Translation Lookaside Buffer to Map Threads in Parallel Applications Based on Shared Memory

inferredcites →https://doi.org/10.1109/ipdps.2012.94openalex-snapshot

Evaluating the Impact of TLB Misses on Future HPC Systems

inferredcites →https://doi.org/10.1109/isca.2005.39openalex-snapshot

Optimizing Replication, Communication, and Capacity Allocation in CMPs

inferredcites →https://doi.org/10.1109/mc.2009.341openalex-snapshot

Architectures for Extreme-Scale Computing

inferredcites →https://doi.org/10.1109/mc.2010.60openalex-snapshot

Analyzing Parallel Programs with Pin

inferredcites →https://doi.org/10.1109/pact.2009.40openalex-snapshot

Cache Sharing Management for Performance Fairness in Chip Multiprocessors

inferredcites →https://doi.org/10.1109/spdp.1990.143503openalex-snapshot

The maximum weight perfect matching problem for complete weighted graphs is in PC

inferredcites →https://doi.org/10.1109/tc.1981.1675756openalex-snapshot

On the Mapping Problem

inferredcites →https://doi.org/10.1145/1080695.1070001openalex-snapshot

Optimizing Replication, Communication, and Capacity Allocation in CMPs

inferredcites →https://doi.org/10.1145/1531793.1531803openalex-snapshot

Enhancing operating system support for multicore processors by using hardware performance monitoring

inferredcites →https://doi.org/10.1145/1941487.1941507openalex-snapshot

The future of microprocessors

inferredcites →https://doi.org/10.1145/605397.605420openalex-snapshot

An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches

inferredcites →https://doi.org/10.1145/635506.605420openalex-snapshot

An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches

inferredcites →https://doi.org/10.1147/jrd.2011.2163967openalex-snapshot

Technologies for exascale systems

inferredcites →https://doi.org/10.1177/109434200001400303openalex-snapshot

A Portable Programming Interface for Performance Evaluation on Modern Processors

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cpe.3487openalex-snapshot

Communication‐aware thread mapping using the translation lookaside buffer

inferred← citeshttps://doi.org/10.1002/cpe.4692openalex-snapshot

BindMe: A thread binding library with advanced mapping algorithms

inferred← citeshttps://doi.org/10.1007/978-3-319-91074-1_4openalex-snapshot

State-of-the-Art Sharing-Aware Mapping Methods

inferred← citeshttps://doi.org/10.1007/978-3-662-48096-0_16openalex-snapshot

Locality and Balance for Communication-Aware Thread Mapping in Multicore Systems

inferred← citeshttps://doi.org/10.1016/j.jpdc.2013.11.006openalex-snapshot

Dynamic thread mapping of shared memory applications by exploiting cache coherence protocols

inferred← citeshttps://doi.org/10.1016/j.jpdc.2025.105145openalex-snapshot

Integration framework for online thread throttling with thread and page mapping on NUMA systems

inferred← citeshttps://doi.org/10.1016/j.parco.2015.01.005openalex-snapshot

Communication-aware process and thread mapping using online communication detection

inferred← citeshttps://doi.org/10.1016/j.peva.2015.03.001openalex-snapshot

Characterizing communication and page usage of parallel applications for thread and data mapping

inferred← citeshttps://doi.org/10.1109/ccgrid.2016.59openalex-snapshot

Automatic Communication Optimization of Parallel Applications in Public Clouds

inferred← citeshttps://doi.org/10.1109/hipc56025.2022openalex-snapshot

2022 IEEE 29th International Conference on High Performance Computing, Data, and Analytics (HiPC)

inferred← citeshttps://doi.org/10.1109/hipc56025.2022.00040openalex-snapshot

COMPROF and COMPLACE: Shared-Memory Communication Profiling and Automated Thread Placement via Dynamic Binary Instrumentation

inferred← citeshttps://doi.org/10.1109/hpcc-smartcity-dss50907.2020.00030openalex-snapshot

Effective Exploration of Thread Throttling and Thread/Page Mapping on NUMA Systems

inferred← citeshttps://doi.org/10.1109/ipdps49936.2021.00041openalex-snapshot

PALM: Progress- and Locality-Aware Adaptive Task Migration for Efficient Thread Packing

inferred← citeshttps://doi.org/10.1109/ipdpsw63119.2024.00202openalex-snapshot

Integration Framework for Online Thread Throttling with Thread and Page Mapping on NUMA Systems

inferred← citeshttps://doi.org/10.1109/pdp.2015.11openalex-snapshot

Locality vs. Balance: Exploring Data Mapping Policies on NUMA Systems

inferred← citeshttps://doi.org/10.1109/pdp.2016.16openalex-snapshot

Communication in Shared Memory: Concepts, Definitions, and Efficient Detection

inferred← citeshttps://doi.org/10.1109/pdp52278.2021.00033openalex-snapshot

Boosting Graph Analytics by Tuning Threads and Data Affinity on NUMA Systems

inferred← citeshttps://doi.org/10.1109/sbac-pad.2014.22openalex-snapshot

Optimizing Memory Locality Using a Locality-Aware Page Table

inferred← citeshttps://doi.org/10.1109/sbesc60926.2023.10324068openalex-snapshot

Optimizing Single-Source Graph Execution on NUMA Machines

inferred← citeshttps://doi.org/10.1109/tpds.2015.2504985openalex-snapshot

Kernel-Based Thread and Data Mapping for Improved Memory Affinity

inferred← citeshttps://doi.org/10.1145/2628071.2628077openalex-snapshot

Compiler support for selective page migration in NUMA architectures

inferred← citeshttps://doi.org/10.1145/2628071.2628085openalex-snapshot

kMAF

inferred← citeshttps://doi.org/10.1145/2695664.2695736openalex-snapshot

Partial coscheduling of virtual machines based on memory access patterns

inferred← citeshttps://doi.org/10.1145/3006385openalex-snapshot

Affinity-Based Thread and Data Mapping in Shared Memory Systems

inferred← citeshttps://doi.org/10.47749/t/unicamp.2016.974962openalex-snapshot

PTB

inferred← citeshttps://doi.org/10.5753/wscad.2021.18525openalex-snapshot

PampaAffinity: Otimização de Aplicações Paralelas via Ajuste Dinâmico e Transparente do Grau de Paralelismo e Mapeamento de Threads

inferred← citeshttps://doi.org/10.5821/dissertation-2117-336238openalex-snapshot

Runtime-assisted coherent caching

Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.