On the public citation graph
F2C2-STM: Flux-Based Feedback-Driven Concurrency Control for STMs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-540-85451-7_77openalex-snapshot
Advanced Concurrency Control for Transactional Memory Using Transaction Commit Rate
inferredcites →https://doi.org/10.1007/978-3-540-92990-1_3openalex-snapshot
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
inferredcites →https://doi.org/10.1007/978-3-642-19448-1openalex-snapshot
Transactions on High-Performance Embedded Architectures and Compilers III
inferredcites →https://doi.org/10.1007/978-3-642-40148-0_17openalex-snapshot
Identifying the Optimal Level of Parallelism in Transactional Memory Applications
inferredcites →https://doi.org/10.1007/s11227-011-0733-yopenalex-snapshot
Restricted admission control in view-oriented transactional memory
inferredcites →https://doi.org/10.1016/j.jpdc.2009.10.008openalex-snapshot
Adaptive execution techniques of parallel programs for multiprocessors
inferredcites →https://doi.org/10.1109/iiswc.2008.4636089openalex-snapshot
STAMP: Stanford Transactional Applications for Multi-Processing
inferredcites →https://doi.org/10.1109/iiswc.2011.6114208openalex-snapshot
Thread reinforcer: Dynamically determining number of threads via OS level monitoring
inferredcites →https://doi.org/10.1109/ipdps.2010.5470434openalex-snapshot
Oversubscription on multicore processors
inferredcites →https://doi.org/10.1109/mascots.2012.40openalex-snapshot
Machine Learning-Based Self-Adjusting Concurrency in Software Transactional Memory Systems
inferredcites →https://doi.org/10.1109/micro.2010.39openalex-snapshot
Memory Latency Reduction via Thread Throttling
inferredcites →https://doi.org/10.1145/1065944.1065976openalex-snapshot
Adaptive execution techniques for SMT multiprocessor architectures
inferredcites →https://doi.org/10.1145/1073814.1073861openalex-snapshot
Advanced contention management for dynamic software transactional memory
inferredcites →https://doi.org/10.1145/1345206.1345241openalex-snapshot
Dynamic performance tuning of word-based software transactional memory
inferredcites →https://doi.org/10.1145/1378533.1378564openalex-snapshot
Adaptive transaction scheduling for transactional memory systems
inferredcites →https://doi.org/10.1145/1504176.1504199openalex-snapshot
A comprehensive strategy for contention management in software transactional memory
inferredcites →https://doi.org/10.1145/1693453.1693465openalex-snapshot
Scheduling support for transactional memory contention management
inferredcites →https://doi.org/10.2316/p.2011.719-011openalex-snapshot
Adaptive Thread Scheduling Techniques for Improving Scalability of Software Transactional Memory
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.4506openalex-snapshot
An autonomic‐computing approach on mapping threads to multi‐cores for software transactional memory
inferred← citeshttps://doi.org/10.1016/j.jpdc.2017.06.001openalex-snapshot
Machine learning-based thread-parallelism regulation in software transactional memory
inferred← citeshttps://doi.org/10.1109/cgo.2019.8661179openalex-snapshot
Quantifying and Reducing Execution Variance in STM via Model Driven Commit Optimization
inferred← citeshttps://doi.org/10.1109/hpcsim.2016.7568314openalex-snapshot
CPU-core frequency scaling for efficient thread scheduling in transactional memories
inferred← citeshttps://doi.org/10.1109/hpcsim.2016.7568333openalex-snapshot
Control of autonomic parallelism adaptation on software transactional memory
inferred← citeshttps://doi.org/10.1109/icac.2016.54openalex-snapshot
Autonomic Parallelism and Thread Mapping Control on Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/ipdps.2018.00057openalex-snapshot
Online Tuning of Parallelism Degree in Parallel Nesting Transactional Memory
inferred← citeshttps://doi.org/10.1109/ispdc51135.2020.00033openalex-snapshot
Thread Affinity in Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/sbac-pad49847.2020.00016openalex-snapshot
Online Sharing-Aware Thread Mapping in Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/tc.2019.2954139openalex-snapshot
Adaptive Model-Based Scheduling in Software Transactional Memory
inferred← citeshttps://doi.org/10.1109/tpds.2017.2740285openalex-snapshot
Analysis, Classification and Comparison of Scheduling Techniques for Software Transactional Memories
inferred← citeshttps://doi.org/10.1145/2755573.2755609openalex-snapshot
Fair Adaptive Parallelism for Concurrent Transactional Memory Applications
inferred← citeshttps://doi.org/10.5555/3314872.3314888openalex-snapshot
Quantifying and reducing execution variance in STM via model driven commit optimization
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