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Co-Run Scheduling with Power Cap on Integrated CPU-GPU Systems
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/11605300_7openalex-snapshot
Co-scheduling with User-Settable Reservations
inferredcites →https://doi.org/10.1007/11605300_9openalex-snapshot
Evolving Toward the Perfect Schedule: Co-scheduling Job Assignments and Data Replication in Wide-Area Systems Using a Genetic Algorithm
inferredcites →https://doi.org/10.1007/978-3-319-17473-0_6openalex-snapshot
Understanding Co-run Degradations on Integrated Heterogeneous Processors
inferredcites →https://doi.org/10.1007/978-3-642-11515-8_16openalex-snapshot
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
inferredcites →https://doi.org/10.1109/cicc.2012.6330644openalex-snapshot
Intel Ivy Bridge unveiled — The first commercial tri-gate, high-k, metal-gate CPU
inferredcites →https://doi.org/10.1109/cluster.2015.15openalex-snapshot
Automatic Command Queue Scheduling for Task-Parallel Workloads in OpenCL
inferredcites →https://doi.org/10.1109/hipc.2014.7116910openalex-snapshot
Smart multi-task scheduling for OpenCL programs on CPU/GPU heterogeneous platforms
inferredcites →https://doi.org/10.1109/hpca.2012.6168947openalex-snapshot
TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture
inferredcites →https://doi.org/10.1109/iccd.2013.6657064openalex-snapshot
Power capping of CPU-GPU heterogeneous systems through coordinating DVFS and task mapping
inferredcites →https://doi.org/10.1109/icppw.2011.59openalex-snapshot
Job Coscheduling on Coupled High-End Computing Systems
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/ipdps.2006.1639376openalex-snapshot
Compatible phase co-scheduling on a CMP of multi-threaded processors
inferredcites →https://doi.org/10.1109/mascots.2015.27openalex-snapshot
To Co-run, or Not to Co-run: A Performance Study on Integrated Architectures
inferredcites →https://doi.org/10.1109/micro.2014.53openalex-snapshot
SMiTe: Precise QoS Prediction on Real-System SMT Processors to Improve Utilization in Warehouse Scale Computers
inferredcites →https://doi.org/10.1109/mm.2012.12openalex-snapshot
Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge
inferredcites →https://doi.org/10.1109/mm.2015.12openalex-snapshot
Denver: Nvidia's First 64-bit ARM Processor
inferredcites →https://doi.org/10.1109/sc.2012.16openalex-snapshot
Accelerating MapReduce on a coupled CPU-GPU architecture
inferredcites →https://doi.org/10.1109/smartcity.2015.127openalex-snapshot
Energy Efficient Job Co-scheduling for High-Performance Parallel Computing Clusters
inferredcites →https://doi.org/10.1109/tpds.2010.193openalex-snapshot
The Complexity of Optimal Job Co-Scheduling on Chip Multiprocessors and Heuristics-Based Solutions
inferredcites →https://doi.org/10.1145/1454115.1454146openalex-snapshot
Analysis and approximation of optimal co-scheduling on chip multiprocessors
inferredcites →https://doi.org/10.1145/1454115.1454151openalex-snapshot
Prediction models for multi-dimensional power-performance optimization on many cores
inferredcites →https://doi.org/10.1145/1531743.1531752openalex-snapshot
A study on optimally co-scheduling jobs of different lengths on chip multiprocessors
inferredcites →https://doi.org/10.1145/2048066.2048103openalex-snapshot
A step towards transparent integration of input-consciousness into dynamic program optimizations
inferredcites →https://doi.org/10.1145/2628071.2628088openalex-snapshot
Adaptive heterogeneous scheduling for integrated GPUs
inferredcites →https://doi.org/10.1145/2872362.2872375openalex-snapshot
Maximizing Performance Under a Power Cap
inferredcites →https://doi.org/10.14778/2536206.2536216openalex-snapshot
Revisiting co-processing for hash joins on the coupled CPU-GPU architecture
inferredcites →https://doi.org/10.14778/2735496.2735497openalex-snapshot
In-cache query co-processing on coupled CPU-GPU architectures
inferredcites →https://doi.org/10.5555/1898953.1899072openalex-snapshot
Compatible phase co-scheduling on a CMP of multi-threaded processors
inferredcites →https://doi.org/10.5555/2388996.2389030openalex-snapshot
Accelerating MapReduce on a coupled CPU-GPU architecture
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.5917openalex-snapshot
Runtime power allocation approach for GAMESS hybrid CPU‐GPU implementation
inferred← citeshttps://doi.org/10.1002/spe.3139openalex-snapshot
DEPO: A dynamic energy‐performance optimizer tool for automatic power capping for energy efficient high‐performance computing
inferred← citeshttps://doi.org/10.1007/978-3-030-96772-7_16openalex-snapshot
Towards Conflict-Aware Workload Co-execution on SX-Aurora TSUBASA
inferred← citeshttps://doi.org/10.1007/978-3-031-21867-5_4openalex-snapshot
Orchestrated Co-scheduling, Resource Partitioning, and Power Capping on CPU-GPU Heterogeneous Systems via Machine Learning
inferred← citeshttps://doi.org/10.1007/978-3-031-23220-6_14openalex-snapshot
On the Convergence of Malleability and the HPC PowerStack: Exploiting Dynamism in Over-Provisioned and Power-Constrained HPC Systems
inferred← citeshttps://doi.org/10.1007/978-3-032-10507-3_10openalex-snapshot
Static Powercap vs. EAR Hard-Powercap: Performance Evaluation
inferred← citeshttps://doi.org/10.1007/s42514-019-00008-6openalex-snapshot
Performance evaluation and analysis of sparse matrix and graph kernels on heterogeneous processors
inferred← citeshttps://doi.org/10.1007/s42514-023-00171-xopenalex-snapshot
Conflict-aware workload co-execution on SX-aurora TSUBASA
inferred← citeshttps://doi.org/10.1016/j.suscom.2018.07.010openalex-snapshot
A survey on techniques for cooperative CPU-GPU computing
inferred← citeshttps://doi.org/10.1016/j.suscom.2020.100412openalex-snapshot
PowerCoord: Power capping coordination for multi-CPU/GPU servers using reinforcement learning
inferred← citeshttps://doi.org/10.1109/ccgrid49817.2020.00-37openalex-snapshot
Indicator-Directed Dynamic Power Management for Iterative Workloads on GPU-Accelerated Systems
inferred← citeshttps://doi.org/10.1109/cluster52292.2023.00023openalex-snapshot
Hierarchical Resource Partitioning on Modern GPUs: A Reinforcement Learning Approach
inferred← citeshttps://doi.org/10.1109/iccd63220.2024.00034openalex-snapshot
Reinforcement Learning-Driven Co-Scheduling and Diverse Resource Assignments on NUMA Systems
inferred← citeshttps://doi.org/10.1109/icdcs57875.2023.00073openalex-snapshot
Energy-Aware Online Task Offloading and Resource Allocation for Mobile Edge Computing
inferred← citeshttps://doi.org/10.1109/igcc.2018.8752132openalex-snapshot
PowerCoord: A Coordinated Power Capping Controller for Multi-CPU/GPU Servers
inferred← citeshttps://doi.org/10.1109/igsc55832.2022.9969360openalex-snapshot
Soft Cluster Powercap at SuperMUC-NG with EAR
inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00087openalex-snapshot
What does Power Consumption Behavior of HPC Jobs Reveal? : Demystifying, Quantifying, and Predicting Power Consumption Characteristics
inferred← citeshttps://doi.org/10.1109/rtss62706.2024.00032openalex-snapshot
Jigsaw: Taming BEV-centric Perception on Dual-SoC for Autonomous Driving
inferred← citeshttps://doi.org/10.1109/tpds.2021.3068235openalex-snapshot
The Case for Cross-Component Power Coordination on Power Bounded Systems
inferred← citeshttps://doi.org/10.1109/tsusc.2024.3362697openalex-snapshot
DRLCAP: Runtime GPU Frequency Capping With Deep Reinforcement Learning
inferred← citeshttps://doi.org/10.1109/works49585.2019.00009openalex-snapshot
Comparing GPU Power and Frequency Capping: A Case Study with the MuMMI Workflow
inferred← citeshttps://doi.org/10.1145/3229710.3229724openalex-snapshot
Graph Support and Scheduling for OpenCL on Heterogeneous Multi-core Systems
inferred← citeshttps://doi.org/10.1145/3466752.3480101openalex-snapshot
PCCS: Processor-Centric Contention-aware Slowdown Model for Heterogeneous System-on-Chips
inferred← citeshttps://doi.org/10.1145/3477028openalex-snapshot
Thermal-aware Adaptive Platform Management for Heterogeneous Embedded Systems
inferred← citeshttps://doi.org/10.1145/3627535.3638502openalex-snapshot
Shared Memory-contention-aware Concurrent DNN Execution for Diversely Heterogeneous System-on-Chips
inferred← citeshttps://doi.org/10.1145/3716872openalex-snapshot
Dynamic Power Management Through Multi-agent Deep Reinforcement Learning for Heterogeneous Systems
inferred← citeshttps://doi.org/10.15439/2018f177openalex-snapshot
Analyzing energy/performance trade-offs with power capping for parallel applications on modern multi and many core processors
inferred← citeshttps://doi.org/10.23919/date51398.2021.9474186openalex-snapshot
Orchestration of Perception Systems for Reliable Performance in Heterogeneous Platforms
inferred← citeshttps://doi.org/10.4236/jcc.2022.109005openalex-snapshot
Runtime Power Allocation Based on Multi-GPU Utilization in GAMESS
inferred← citeshttps://doi.org/10.48550/arxiv.2004.05777openalex-snapshot
Intelligent Orchestration of ADAS Pipelines on Next Generation Automotive Platforms
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