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Improving Cost, Performance, and Security of Memory Encryption and Authentication
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/eurmic.1999.794507openalex-snapshot
Enhancing security in the memory management unit
inferredcites →https://doi.org/10.1109/hpca.2003.1183547openalex-snapshot
Caches and hash trees for efficient memory integrity verification
inferredcites →https://doi.org/10.1109/hpca.2005.31openalex-snapshot
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
inferredcites →https://doi.org/10.1109/mc.2002.1039525openalex-snapshot
The trusted PC: skin-deep security
inferredcites →https://doi.org/10.1109/micro.2003.1253207openalex-snapshot
Efficient memory integrity verification and encryption for secure processors
inferredcites →https://doi.org/10.1109/micro.2003.1253209openalex-snapshot
Fast secure processor for inhibiting software piracy and tampering
inferredcites →https://doi.org/10.1109/pact.2004.1342547openalex-snapshot
Architectural support for high speed protection of memory integrity and confidentiality in multiprocessor systems
inferredcites →https://doi.org/10.1109/secpri.2003.1199335openalex-snapshot
Specifying and verifying hardware for tamper-resistant software
inferredcites →https://doi.org/10.1109/sfcs.1997.646128openalex-snapshot
A concrete security treatment of symmetric encryption
inferredcites →https://doi.org/10.1145/1055626.1055629openalex-snapshot
Towards the issues in architectural support for protection of software execution
inferredcites →https://doi.org/10.1145/1080695.1069972openalex-snapshot
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation
inferredcites →https://doi.org/10.1145/378995.379237openalex-snapshot
Architectural support for copy and tamper resistant software
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s00034-013-9621-4openalex-snapshot
MEM-DnP—A Novel Energy Efficient Approach for Memory Integrity Detection and Protection in Embedded Systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2013.04.008openalex-snapshot
TSV: A novel energy efficient Memory Integrity Verification scheme for embedded systems
inferred← citeshttps://doi.org/10.1109/acsac.2008.45openalex-snapshot
Defending Against Attacks on Main Memory Persistence
inferred← citeshttps://doi.org/10.1109/ares.2016.75openalex-snapshot
Protecting Sensitive Information in the Volatile Memory from Disclosure Attacks
inferred← citeshttps://doi.org/10.1109/ccgrid59990.2024.00015openalex-snapshot
PireSPM: Efficient and Recoverable Secure Persistent Memory for Multi-cores
inferred← citeshttps://doi.org/10.1109/dac.2018.8465847openalex-snapshot
Reducing the Overhead of Authenticated Memory Encryption Using Delta Encoding and ECC Memory
inferred← citeshttps://doi.org/10.1109/dcabes.2012.55openalex-snapshot
Memory Confidentiality and Integrity Protection Method Based on Variable Length Counter
inferred← citeshttps://doi.org/10.1109/dsn.2010.5544298openalex-snapshot
Improving privacy and lifetime of PCM-based main memory
inferred← citeshttps://doi.org/10.1109/hpca.2013.6522323openalex-snapshot
Architecture support for guest-transparent VM protection from untrusted hypervisor and physical attacks
inferred← citeshttps://doi.org/10.1109/hpca.2018.00046openalex-snapshot
SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories
inferred← citeshttps://doi.org/10.1109/hpca53966.2022.00026openalex-snapshot
SecNDP: Secure Near-Data Processing with Untrusted Memory
inferred← citeshttps://doi.org/10.1109/hpca56546.2023.10070991openalex-snapshot
Thoth: Bridging the Gap Between Persistently Secure Memories and Memory Interfaces of Emerging NVMs
inferred← citeshttps://doi.org/10.1109/hpca56546.2023.10071100openalex-snapshot
Plutus: Bandwidth-Efficient Memory Security for GPUs
inferred← citeshttps://doi.org/10.1109/hpca57654.2024.00025openalex-snapshot
Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management
inferred← citeshttps://doi.org/10.1109/hpca57654.2024.00027openalex-snapshot
Salus: Efficient Security Support for CXL-Expanded GPU Memory
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408582openalex-snapshot
SCALE: Tackling Communication Bottlenecks in Confidential Distributed Machine Learning
inferred← citeshttps://doi.org/10.1109/hpca68181.2026.11408600openalex-snapshot
Secret Caching Sauce for High-Performance Secure Memory
inferred← citeshttps://doi.org/10.1109/icspcc.2011.6061646openalex-snapshot
Board-level authentication through I/O fingerprinter
inferred← citeshttps://doi.org/10.1109/ispass51385.2021.00026openalex-snapshot
Efficient Split Counter Mode Encryption for NVM
inferred← citeshttps://doi.org/10.1109/lca.2018.2861012openalex-snapshot
Counter Advance for Reliable Encryption in Phase Change Memory
inferred← citeshttps://doi.org/10.1109/mcas.2024.3509376openalex-snapshot
Secure Machine Learning Hardware: Challenges and Progress [Feature]
inferred← citeshttps://doi.org/10.1109/tc.2016.2642180openalex-snapshot
Endurance-Aware Security Enhancement in Non-Volatile Memories Using Compression and Selective Encryption
inferred← citeshttps://doi.org/10.1109/tdsc.2024.3389560openalex-snapshot
Delta Counter: Bandwidth-Efficient Encryption Counter Representation for Secure GPU Memory
inferred← citeshttps://doi.org/10.1109/tifs.2022.3188146openalex-snapshot
ELM: A Low-Latency and Scalable Memory Encryption Scheme
inferred← citeshttps://doi.org/10.1109/tpds.2011.131openalex-snapshot
Fast Secure Communications in Shared Memory Multiprocessor Systems
inferred← citeshttps://doi.org/10.1109/tvlsi.2024.3360370openalex-snapshot
Analyzing the Vulnerabilities of External SDRAM on System-on-Chip Field Programmable Gate Array Devices
inferred← citeshttps://doi.org/10.1109/tvlsi.2025.3650411openalex-snapshot
Securing DNN Acceleration From Off-Chip Memory Vulnerabilities With Low-Overhead Authenticated Encryption
inferred← citeshttps://doi.org/10.1145/1152154.1152170openalex-snapshot
Efficient data protection for distributed shared memory multiprocessors
inferred← citeshttps://doi.org/10.1145/1242531.1242539openalex-snapshot
Accelerating memory decryption and authentication with frequent value prediction
inferred← citeshttps://doi.org/10.1145/1456455.1456461openalex-snapshot
A fast real-time memory authentication protocol
inferred← citeshttps://doi.org/10.1145/2380403.2380414openalex-snapshot
A cost-effective tag design for memory data authentication in embedded systems
inferred← citeshttps://doi.org/10.1145/2442116.2442121openalex-snapshot
Configurable memory security in embedded systems
inferred← citeshttps://doi.org/10.1145/2482767.2482799openalex-snapshot
Multi-processor architectural support for protecting virtual machine privacy in untrusted cloud environment
inferred← citeshttps://doi.org/10.1145/2485922.2485971openalex-snapshot
Design space exploration and optimization of path oblivious RAM in secure processors
inferred← citeshttps://doi.org/10.1145/2508148.2485971openalex-snapshot
Design space exploration and optimization of path oblivious RAM in secure processors
inferred← citeshttps://doi.org/10.1145/2611765.2611774openalex-snapshot
Towards fast hardware memory integrity checking with skewed Merkle trees
inferred← citeshttps://doi.org/10.1145/2902961.2903512openalex-snapshot
Leveraging 3D Technologies for Hardware Security
inferred← citeshttps://doi.org/10.1145/2943780openalex-snapshot
MAC Precomputation with Applications to Secure Memory
inferred← citeshttps://doi.org/10.1145/3297858.3304020openalex-snapshot
Architectural Support for Containment-based Security
inferred← citeshttps://doi.org/10.1145/3466752.3480067openalex-snapshot
Bonsai Merkle Forests: Efficiently Achieving Crash Consistency in Secure Persistent Memory
inferred← citeshttps://doi.org/10.1145/3466752.3480118openalex-snapshot
Dolos: Improving the Performance of Persistent Applications in ADR-Supported Secure Memory
inferred← citeshttps://doi.org/10.1145/3613424.3614273openalex-snapshot
SecureLoop: Design Space Exploration of Secure DNN Accelerators
inferred← citeshttps://doi.org/10.1145/3695053.3731007openalex-snapshot
When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer Mitigations
inferred← citeshttps://doi.org/10.1145/3708541openalex-snapshot
COVER: Alleviating Crash-Consistency Error Amplification in Secure Persistent Memory Systems
inferred← citeshttps://doi.org/10.1145/3719653openalex-snapshot
XpuTEE: A High-Performance and Practical Heterogeneous Trusted Execution Environment for GPUs
inferred← citeshttps://doi.org/10.23919/date.2017.7927118openalex-snapshot
A wear-leveling-aware counter mode for data encryption in non-volatile memories
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