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Memory encryption
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/11605805_1openalex-snapshot
Cache Attacks and Countermeasures: The Case of AES
inferredcites →https://doi.org/10.1007/11909033_11openalex-snapshot
A New Encryption and Hashing Scheme for the Security Architecture for Microprocessors
inferredcites →https://doi.org/10.1007/3-540-44709-1_9openalex-snapshot
Pseudo-random Number Generation on the IBM 4758 Secure Crypto Coprocessor
inferredcites →https://doi.org/10.1007/3-540-48405-1_26openalex-snapshot
Towards Sound Approaches to Counteract Power-Analysis Attacks
inferredcites →https://doi.org/10.1007/978-3-642-00904-4_3openalex-snapshot
Compiler-Assisted Memory Encryption for Embedded Processors
inferredcites →https://doi.org/10.1007/978-3-642-01004-0_1openalex-snapshot
Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines
inferredcites →https://doi.org/10.1007/978-3-642-11389-5openalex-snapshot
Transactions on Computational Science VII
inferredcites →https://doi.org/10.1007/978-3-642-11389-5_6openalex-snapshot
An Analysis of Secure Processor Architectures
inferredcites →https://doi.org/10.1007/978-3-642-38980-1_19openalex-snapshot
Beyond Full Disk Encryption: Protection on Security-Enhanced Commodity Processors
inferredcites →https://doi.org/10.1016/j.diin.2010.01.005openalex-snapshot
Using a software exploit to image RAM on an embedded system
inferredcites →https://doi.org/10.1016/j.diin.2011.09.005openalex-snapshot
The growing impact of full disk encryption on digital forensics
inferredcites →https://doi.org/10.1109/12.729797openalex-snapshot
Cipher instruction search attack on the bus-encryption security microcontroller DS5002FP
inferredcites →https://doi.org/10.1109/acsac.2006.21openalex-snapshot
CryptoPage: An Efficient Secure Architecture with Memory Encryption, Integrity and Information Leakage Protection
inferredcites →https://doi.org/10.1109/acsac.2008.45openalex-snapshot
Defending Against Attacks on Main Memory Persistence
inferredcites →https://doi.org/10.1109/date.2005.170openalex-snapshot
Hardware Engines for Bus Encryption: A Survey of Existing Techniques
inferredcites →https://doi.org/10.1109/hpca.2003.1183547openalex-snapshot
Caches and hash trees for efficient memory integrity verification
inferredcites →https://doi.org/10.1109/hpca.2005.31openalex-snapshot
SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors
inferredcites →https://doi.org/10.1109/hpca.2008.4658636openalex-snapshot
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors
inferredcites →https://doi.org/10.1109/icvd.2004.1260985openalex-snapshot
Tamper resistance mechanisms for secure embedded systems
inferredcites →https://doi.org/10.1109/isca.2006.22openalex-snapshot
Improving Cost, Performance, and Security of Memory Encryption and Authentication
inferredcites →https://doi.org/10.1109/isscc.2000.839758openalex-snapshot
Non-invasive timing analysis of IBM G6 microprocessor L1 cache using backside time-resolved hot electron luminescence
inferredcites →https://doi.org/10.1109/lisat.2009.5031562openalex-snapshot
Implications of Microsoft Vista operating system for computer forensics investigations
inferredcites →https://doi.org/10.1109/mc.2004.170openalex-snapshot
Magic boxes and boots: security in hardware
inferredcites →https://doi.org/10.1109/mdt.2007.179openalex-snapshot
Aegis: A Single-Chip Secure Processor
inferredcites →https://doi.org/10.1109/msp.2010.111openalex-snapshot
XTS: A Mode of AES for Encrypting Hard Disks
inferredcites →https://doi.org/10.1109/pact.2007.39openalex-snapshot
I2SEMS: Interconnects-Independent Security Enhanced Shared Memory Multiprocessor Systems
inferredcites →https://doi.org/10.1109/portable.2007.47openalex-snapshot
Computing Cryptographic Algorithms in Portable and Embedded Devices
inferredcites →https://doi.org/10.1109/tc.2005.80openalex-snapshot
Improving Memory Encryption Performance in Secure Processors
inferredcites →https://doi.org/10.1109/ths.2010.5655081openalex-snapshot
Cryptkeeper: Improving security with encrypted RAM
inferredcites →https://doi.org/10.1145/1150019.1136502openalex-snapshot
Improving Cost, Performance, and Security of Memory Encryption and Authentication
inferredcites →https://doi.org/10.1145/1152154.1152169openalex-snapshot
A low-cost memory remapping scheme for address bus protection
inferredcites →https://doi.org/10.1145/1152154.1152170openalex-snapshot
Efficient data protection for distributed shared memory multiprocessors
inferredcites →https://doi.org/10.1145/1403375.1403657openalex-snapshot
Operating system controlled processor-memory bus encryption
inferredcites →https://doi.org/10.1145/2830772openalex-snapshot
Proceedings of the 48th International Symposium on Microarchitecture
inferredcites →https://doi.org/10.1145/378993.379237openalex-snapshot
Architectural support for copy and tamper resistant software
inferredcites →https://doi.org/10.1145/378995.379237openalex-snapshot
Architectural support for copy and tamper resistant software
inferredcites →https://doi.org/10.1145/948109.948147openalex-snapshot
Randomized instruction set emulation to disrupt binary code injection attacks
inferredcites →https://doi.org/10.1147/rd.483.0475openalex-snapshot
The IBM PCIXCC: A new cryptographic coprocessor for the IBM eServer
inferredcites →https://doi.org/10.2139/ssrn.1640805openalex-snapshot
Do Data Breach Disclosure Laws Reduce Identity Theft?
inferredcites →https://doi.org/10.5555/1025127.1026002openalex-snapshot
Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems
inferredcites →https://doi.org/10.5555/956417.956575openalex-snapshot
Efficient memory integrity verification and encryption for secure processors
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/adfm.78487openalex-snapshot
Thermosensitive Elastic Depinning Kinetics in Ultrathin Ferroelectric Hf x Zr 1−x O 2 Films for Self‐Revoking Cryogenic Memory
inferred← citeshttps://doi.org/10.1002/sec.1071openalex-snapshot
Ultra simple way to encrypt non‐volatile main memory
inferred← citeshttps://doi.org/10.1002/smr.70023openalex-snapshot
ECP: Coprocessor Architecture to Protect Program Logic Consistency
inferred← citeshttps://doi.org/10.1007/978-3-030-00470-5_18openalex-snapshot
CryptMe: Data Leakage Prevention for Unmodified Programs on ARM Devices
inferred← citeshttps://doi.org/10.1007/978-3-030-57878-7_16openalex-snapshot
MemShield: GPU-Assisted Software Memory Encryption
inferred← citeshttps://doi.org/10.1007/978-3-031-37989-5_11openalex-snapshot
Multilayer Approach to Logic Locking
inferred← citeshttps://doi.org/10.1007/978-3-031-56326-3_17openalex-snapshot
SecPassInput: Towards Secure Memory and Password Handling in Web Applications
inferred← citeshttps://doi.org/10.1007/978-3-031-68024-3_5openalex-snapshot
Addressing Privacy Concerns in Joint Communication and Sensing for 6G Networks: Challenges and Prospects
inferred← citeshttps://doi.org/10.1007/978-3-319-09885-2_19openalex-snapshot
Smart User Authentication for an Improved Data Privacy
inferred← citeshttps://doi.org/10.1007/978-3-319-33630-5_20openalex-snapshot
RegRSA: Using Registers as Buffers to Resist Memory Disclosure Attacks
inferred← citeshttps://doi.org/10.1007/978-3-319-58469-0_17openalex-snapshot
Runtime Firmware Product Lines Using TPM2.0
inferred← citeshttps://doi.org/10.1007/978-3-319-66399-9_20openalex-snapshot
No Sugar but All the Taste! Memory Encryption Without Architectural Support
inferred← citeshttps://doi.org/10.1007/978-3-642-38980-1_19openalex-snapshot
Beyond Full Disk Encryption: Protection on Security-Enhanced Commodity Processors
inferred← citeshttps://doi.org/10.1007/978-3-662-53008-5_5openalex-snapshot
The SKINNY Family of Block Ciphers and Its Low-Latency Variant MANTIS
inferred← citeshttps://doi.org/10.1007/978-981-10-7290-1_72openalex-snapshot
Security Threat Analysis and Prevention Techniques in Electronic Waste
inferred← citeshttps://doi.org/10.1007/978-981-15-6229-7_14openalex-snapshot
Improved VLSI Architecture of Dual-CLCG for Pseudo-Random Bit Generator
inferred← citeshttps://doi.org/10.1007/s00521-017-2873-3openalex-snapshot
CUDA-based parallelization of a bio-inspired model for fast object classification
inferred← citeshttps://doi.org/10.1007/s10586-016-0721-3openalex-snapshot
Cryptographic key protection against FROST for mobile devices
inferred← citeshttps://doi.org/10.1007/s11227-025-08029-5openalex-snapshot
Post-quantum secure authentication protocol based on OTP and TEE
inferred← citeshttps://doi.org/10.1007/s41635-018-0034-5openalex-snapshot
A Survey of Techniques for Improving Security of Non-volatile Memories
inferred← citeshttps://doi.org/10.1016/j.aej.2020.11.003openalex-snapshot
A lightweight cryptography (LWC) framework to secure memory heap in Internet of Things
inferred← citeshttps://doi.org/10.1016/j.compbiomed.2020.104130openalex-snapshot
Precision health data: Requirements, challenges and existing techniques for data security and privacy
inferred← citeshttps://doi.org/10.1016/j.cosrev.2018.01.002openalex-snapshot
Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses
inferred← citeshttps://doi.org/10.1016/j.cosrev.2022.100530openalex-snapshot
Elliptic Curve Cryptography; Applications, challenges, recent advances, and future trends: A comprehensive survey
inferred← citeshttps://doi.org/10.1016/j.jpdc.2024.104898openalex-snapshot
Efficient and lightweight in-memory computing architecture for hardware security
inferred← citeshttps://doi.org/10.1016/j.jvcir.2016.07.021openalex-snapshot
Event recognition in photo albums using probabilistic graphical models and feature relevance
inferred← citeshttps://doi.org/10.1016/j.micpro.2018.10.001openalex-snapshot
Lightweight instruction-level encryption for embedded processors using stream ciphers
inferred← citeshttps://doi.org/10.1051/matecconf/201821002047openalex-snapshot
Embedded System Confidentiality Protection by Cryptographic Engine Implemented with Composite Field Arithmetic
inferred← citeshttps://doi.org/10.1109/ares.2016.13openalex-snapshot
HyperCrypt: Hypervisor-Based Encryption of Kernel and User Space
inferred← citeshttps://doi.org/10.1109/aspdac.2016.7428036openalex-snapshot
Data privacy in non-volatile cache: Challenges, attack models and solutions
inferred← citeshttps://doi.org/10.1109/atsip62566.2024.10638850openalex-snapshot
In-Memory Computing Architecture for Efficient Hardware Security
inferred← citeshttps://doi.org/10.1109/candar.2016.0068openalex-snapshot
Last Path Caching: A Simple Way to Remove Redundant Memory Accesses of Path ORAM
inferred← citeshttps://doi.org/10.1109/ccwc60891.2024.10427780openalex-snapshot
Should Smart Homes Be Afraid of Evil Maids? : Identifying Vulnerabilities in IoT Device Firmware
inferred← citeshttps://doi.org/10.1109/cscloud66326.2025.00012openalex-snapshot
Leveraging AVX Registers for Enhanced Encryption Security: The SecureKey Approach
inferred← citeshttps://doi.org/10.1109/dac.2018.8465848openalex-snapshot
Power-based Side-Channel Instruction-level Disassembler
inferred← citeshttps://doi.org/10.1109/dac63849.2025.11132968openalex-snapshot
AutoSkewBMT: Autonomously Synthesizing Optimized Integrity Authentication Mechanism for DNN Accelerators
inferred← citeshttps://doi.org/10.1109/dsc54232.2022.9888802openalex-snapshot
Cache Locking and Encryption to Prevent Memory Snooping in Embedded Systems
inferred← citeshttps://doi.org/10.1109/dsd.2017.25openalex-snapshot
Lightweight Software Encryption for Embedded Processors
inferred← citeshttps://doi.org/10.1109/dsd.2018.00101openalex-snapshot
On the Design of a Processor Working Over Encrypted Data
inferred← citeshttps://doi.org/10.1109/fdtc.2016.20openalex-snapshot
Attacks on Encrypted Memory and Constructions for Memory Protection
inferred← citeshttps://doi.org/10.1109/host55342.2024.10545394openalex-snapshot
CTR+: A High-Performance Metadata Access Scheme for Secure Embedded Memory in Heterogeneous Computing Systems
inferred← citeshttps://doi.org/10.1109/hpca.2017.10openalex-snapshot
Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors
inferred← citeshttps://doi.org/10.1109/hst.2016.7495562openalex-snapshot
Blinded random corruption attacks
inferred← citeshttps://doi.org/10.1109/hst.2016.7495582openalex-snapshot
Redirecting DRAM memory pages: Examining the threat of system memory Hardware Trojans
inferred← citeshttps://doi.org/10.1109/iccad66269.2025.11240703openalex-snapshot
FlexTEE: Dynamically Enhancing Metadata Locality Through Affine Address Transformation for Heterogeneous & Secure AI Platforms
inferred← citeshttps://doi.org/10.1109/iccd.2018.00072openalex-snapshot
NVCool: When Non-Volatile Caches Meet Cold Boot Attacks
inferred← citeshttps://doi.org/10.1109/ice348803.2020.9122818openalex-snapshot
Design of Modified Dual-CLCG Algorithm for Pseudo-Random Bit Generator
inferred← citeshttps://doi.org/10.1109/icedge67252.2025.11412927openalex-snapshot
The Fact of the MATTER: Efficient Hardware Accelerators for Wide-Block Memory Encryption
inferred← citeshttps://doi.org/10.1109/icicat62666.2024.10923124openalex-snapshot
Cloud VM Lifecycle Security: Framework Based on Trusted Computing
inferred← citeshttps://doi.org/10.1109/icosst.2014.7029328openalex-snapshot
Keeping secret keys secret in open systems
inferred← citeshttps://doi.org/10.1109/icsseecc61126.2024.10649478openalex-snapshot
Resource Analysis of Lightweight Cryptography Algorithms for Compact Devices
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00067openalex-snapshot
A Bus Authentication and Anti-Probing Architecture Extending Hardware Trusted Computing Base Off CPU Chips and Beyond
inferred← citeshttps://doi.org/10.1109/isca52012.2021.00045openalex-snapshot
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
inferred← citeshttps://doi.org/10.1109/jiot.2023.3333203openalex-snapshot
Low-Latency PAE: Permutation-Based Address Encryption Hardware Engine for IoT Real-Time Memory Protection
inferred← citeshttps://doi.org/10.1109/jssc.2025.3534753openalex-snapshot
Digital In-Memory Compute for Machine Learning Applications With Input and Model Security
inferred← citeshttps://doi.org/10.1109/micro.2018.00043openalex-snapshot
Improving the Performance and Endurance of Encrypted Non-Volatile Main Memory through Deduplicating Writes
inferred← citeshttps://doi.org/10.1109/mnano.2022.3141514openalex-snapshot
Efficient In-Memory AES Encryption Implementation Using a General Memristive Logic: Surmounting the data movement bottleneck
inferred← citeshttps://doi.org/10.1109/msp.2016.124openalex-snapshot
Memory Encryption for General-Purpose Processors
inferred← citeshttps://doi.org/10.1109/newcas64648.2025.11107134openalex-snapshot
Improving Supply Chain Security with Secure External Memories
inferred← citeshttps://doi.org/10.1109/peeic59336.2023.10450587openalex-snapshot
Trusted Computation for Cloud VM Lifetime Security
inferred← citeshttps://doi.org/10.1109/socc49529.2020.9524762openalex-snapshot
A Reconfigurable Permutation Based Address Encryption Architecture for Memory Security
inferred← citeshttps://doi.org/10.1109/sp.2016.13openalex-snapshot
CaSE: Cache-Assisted Secure Execution on ARM Processors
inferred← citeshttps://doi.org/10.1109/tc.2016.2642180openalex-snapshot
Endurance-Aware Security Enhancement in Non-Volatile Memories Using Compression and Selective Encryption
inferred← citeshttps://doi.org/10.1109/tc.2019.2946365openalex-snapshot
Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks
inferred← citeshttps://doi.org/10.1109/tcad.2016.2638439openalex-snapshot
Hiding Hardware Trojan Communication Channels in Partially Specified SoC Bus Functionality
inferred← citeshttps://doi.org/10.1109/tcad.2017.2750067openalex-snapshot
Enabling Security-Enhanced Attestation With Intel SGX for Remote Terminal and IoT
inferred← citeshttps://doi.org/10.1109/tdsc.2018.2858257openalex-snapshot
Atlas: Application Confidentiality in Compromised Embedded Systems
inferred← citeshttps://doi.org/10.1109/tdsc.2023.3324935openalex-snapshot
A Secure Computing System With Hardware-Efficient Lazy Bonsai Merkle Tree for FPGA-Attached Embedded Memory
inferred← citeshttps://doi.org/10.1109/tetc.2020.3027789openalex-snapshot
Hardware Constructions for Lightweight Cryptographic Block Cipher QARMA With Error Detection Mechanisms
inferred← citeshttps://doi.org/10.1109/tvlsi.2018.2865133openalex-snapshot
Securing Emerging Nonvolatile Main Memory With Fast and Energy-Efficient AES In-Memory Implementation
inferred← citeshttps://doi.org/10.1142/s0218126621501826openalex-snapshot
Efficient Hardware Implementation of Pseudo-Random Bit Generator Using Dual-CLCG Method
inferred← citeshttps://doi.org/10.1145/3029806.3029836openalex-snapshot
Fault Attacks on Encrypted General Purpose Compute Platforms
inferred← citeshttps://doi.org/10.1145/3359621openalex-snapshot
Leveraging Side-Channel Information for Disassembly and Security
inferred← citeshttps://doi.org/10.1145/3381898.3397210openalex-snapshot
Improving phase change memory performance with data content aware access
inferred← citeshttps://doi.org/10.1145/3487058openalex-snapshot
Code Polymorphism Meets Code Encryption: Confidentiality and Side-channel Protection of Software Components
inferred← citeshttps://doi.org/10.1145/3595179openalex-snapshot
HMT: A Hardware-centric Hybrid Bonsai Merkle Tree Algorithm for High-performance Authentication
inferred← citeshttps://doi.org/10.1145/3721145.3734533openalex-snapshot
Persistent Memory Objects on the Cheap
inferred← citeshttps://doi.org/10.1145/3725843.3756047openalex-snapshot
COSMOS: RL-Enhanced Locality-Aware Counter Cache Optimization for Secure Memory
inferred← citeshttps://doi.org/10.1145/3779208.3785293openalex-snapshot
TRM: An Efficient Hypervisor-Based Framework For Malware Analysis and Memory Reconstruction
inferred← citeshttps://doi.org/10.1177/1094342019847264openalex-snapshot
Implementing efficient data compression and encryption in a persistent key-value store for HPC
inferred← citeshttps://doi.org/10.15760/etd.7414openalex-snapshot
A Computer Science Academic Vocabulary List
inferred← citeshttps://doi.org/10.15803/ijnc.7.2_106openalex-snapshot
A Virtual Cache for Overlapped Memory Accesses of Path ORAM
inferred← citeshttps://doi.org/10.23919/date.2017.7927118openalex-snapshot
A wear-leveling-aware counter mode for data encryption in non-volatile memories
inferred← citeshttps://doi.org/10.32657/10356/138253openalex-snapshot
Securing untrusted memories in embedded systems
inferred← citeshttps://doi.org/10.3390/electronics9081304openalex-snapshot
NVM-Shelf: Secure Hybrid Encryption with Less Flip for Non-Volatile Memory
inferred← citeshttps://doi.org/10.3850/9783981537079_0302openalex-snapshot
Hardware Trojans in Incompletely Specified On-chip Bus Systems
inferred← citeshttps://doi.org/10.46586/tosc.v2023.i3.25-73openalex-snapshot
The QARMAv2 Family of Tweakable Block Ciphers
inferred← citeshttps://doi.org/10.48550/arxiv.1612.03744openalex-snapshot
Fault Attacks on Encrypted General Purpose Compute Platforms
inferred← citeshttps://doi.org/10.48550/arxiv.1902.07344openalex-snapshot
Dataplant: Enhancing System Security with Low-Cost In-DRAM Value Generation Primitives
inferred← citeshttps://doi.org/10.48550/arxiv.2008.03752openalex-snapshot
SEALing Neural Network Models in Secure Deep Learning Accelerators
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