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Metal gate-HfO/sub 2/ MOS structures on GaAs substrate with and without Si interlayer
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1063/1.100961openalex-snapshot
Unpinned gallium oxide/GaAs interface by hydrogen and nitrogen surface plasma treatment
inferredcites →https://doi.org/10.1063/1.101451openalex-snapshot
Electronic passivation of GaAs surfaces through the formation of arsenic—sulfur bonds
inferredcites →https://doi.org/10.1063/1.104217openalex-snapshot
Properties and thermal stability of the SiO2/GaAs interface with different surface treatments
inferredcites →https://doi.org/10.1063/1.109162openalex-snapshot
Si3N4/Si/n-GaAs capacitor with minimum interface density in the 1010 eV−1 cm−2 range
inferredcites →https://doi.org/10.1063/1.111839openalex-snapshot
Si/Ge/S multilayer passivation of GaAs(100) for metal-insulator-semiconductor capacitors
inferredcites →https://doi.org/10.1063/1.1635068openalex-snapshot
Role of Ga2O3 template thickness and gadolinium mole fraction in GdxGa0.4−xO0.6/Ga2O3 gate dielectric stacks on GaAs
inferredcites →https://doi.org/10.1063/1.1785851openalex-snapshot
Chemical and electrical characterization of Gd2O3∕GaAs interface improved by sulfur passivation
inferredcites →https://doi.org/10.1063/1.335482openalex-snapshot
Transmission electron microscopy studies on the lateral growth of nickel silicides
inferredcites →https://doi.org/10.1063/1.358429openalex-snapshot
Metal-insulator-semiconductor capacitors on cleaved GaAs(110)
inferredcites →https://doi.org/10.1063/1.56801openalex-snapshot
Characterization of ultra-thin oxides using electrical C-V and I-V measurements
inferredcites →https://doi.org/10.1109/iedm.1999.823863openalex-snapshot
Ultrathin hafnium oxide with low leakage and excellent reliability for alternative gate dielectric application
inferredcites →https://doi.org/10.1109/led.2002.807020openalex-snapshot
Mobility enhancement in surface channel SiGe PMOSFETs with HfO2 gate dielectrics
inferredcites →https://doi.org/10.1109/vlsit.2004.1345473openalex-snapshot
Dual work function metal gate CMOS using CVD metal electrodes
inferredcites →https://doi.org/10.1116/1.584199openalex-snapshot
Scanning tunneling spectroscopy of oxygen adsorbates on the GaAs(110) surface
inferredcites →https://doi.org/10.1116/1.584616openalex-snapshot
Control of compound semiconductor–insulator interfaces by an ultrathin molecular-beam epitaxy Si layer
inferredcites →https://doi.org/10.1116/1.584979openalex-snapshot
Studies of GaAs–oxide interfaces with and without Si interlayer
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Issues in High‐kGate Dielectrics and its Stack Interfaces
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Atomic-Layer Deposited High-k/III-V Metal-Oxide-Semiconductor Devices and Correlated Empirical Model
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Materials and Technologies for III-V MOSFETs
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Effect of Ge interface control layer on the interfacial and electrical properties of TaYOx thin films on GaAs substrates
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Interface models and processing technologies for surface passivation and interface control in III–V semiconductor nanoelectronics
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Surface passivation technology for III–V semiconductor nanoelectronics
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Characterization of Y2O3 gate dielectric on n-GaAs substrates
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Surface passivation of III–V semiconductors for future CMOS devices—Past research, present status and key issues for future
inferred← citeshttps://doi.org/10.1016/j.apsusc.2017.04.031openalex-snapshot
Improvement in interfacial characteristics of low-voltage carbon nanotube thin-film transistors with solution-processed boron nitride thin films
inferred← citeshttps://doi.org/10.1016/j.cplett.2013.08.012openalex-snapshot
High-k ZrO2 dielectric thin films on GaAs semiconductor with reduced regrowth of native oxides by atomic layer deposition
inferred← citeshttps://doi.org/10.1016/j.mee.2007.04.056openalex-snapshot
In-situ MBE Si as passivating interlayer on GaAs for HfO2 MOSCAP’s: effect of GaAs surface reconstruction
inferred← citeshttps://doi.org/10.1016/j.mee.2008.09.017openalex-snapshot
Self-aligned n-channel GaAs metal–oxide–semiconductor field-effect transistors (MOSFETs) using HfO2 and silicon interface passivation layer: Post-metal annealing optimization
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Improved electrical characteristics and reliability of amorphous InGaZnO metal–insulator–semiconductor capacitor with high κ HfOxNy gate dielectric
inferred← citeshttps://doi.org/10.1016/j.sse.2007.06.002openalex-snapshot
Determining weak Fermi-level pinning in MOS devices by conductance and capacitance analysis and application to GaAs MOS devices
inferred← citeshttps://doi.org/10.1016/j.surfcoat.2023.130257openalex-snapshot
Plasma Deposited Amorphous Silicon Passivation Layers on Inas Surfaces
inferred← citeshttps://doi.org/10.1016/j.surfrep.2013.01.002openalex-snapshot
Interface engineering and chemistry of Hf-based high-k dielectrics on III–V substrates
inferred← citeshttps://doi.org/10.1021/acsami.2c01134openalex-snapshot
Performance Limit of Ultrathin GaAs Transistors
inferred← citeshttps://doi.org/10.1021/am302537bopenalex-snapshot
Surface Passivation and Interface Properties of Bulk GaAs and Epitaxial-GaAs/Ge Using Atomic Layer Deposited TiAlO Alloy Dielectric
inferred← citeshttps://doi.org/10.1021/am302803fopenalex-snapshot
Structural Evolution and the Control of Defects in Atomic Layer Deposited HfO2–Al2O3 Stacked Films on GaAs
inferred← citeshttps://doi.org/10.1021/am506351uopenalex-snapshot
Modulating the Interface Quality and Electrical Properties of HfTiO/InGaAs Gate Stack by Atomic-Layer-Deposition-Derived Al2O3 Passivation Layer
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Ferroelectrically gated sub-6 nm monolayer MoS 2 transistors for high-performance and low-power applications
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High-κ gate dielectrics with ultra-low leakage current for sub-45 nm CMOS
inferred← citeshttps://doi.org/10.1063/1.2358202openalex-snapshot
High-performance GaAs metal-insulator-semiconductor field-effect transistors enabled by self-assembled nanodielectrics
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Aluminum oxynitride interfacial passivation layer for high-permittivity gate dielectric stack on gallium arsenide
inferred← citeshttps://doi.org/10.1063/1.2396912openalex-snapshot
Metal gate-HfO2 metal-oxide-semiconductor capacitors on n-GaAs substrate with silicon/germanium interfacial passivation layers
inferred← citeshttps://doi.org/10.1063/1.2732821openalex-snapshot
Impact of interfacial layer control using Gd2O3 in HfO2 gate dielectric on GaAs
inferred← citeshttps://doi.org/10.1063/1.2764438openalex-snapshot
Impact of surface chemical treatment on capacitance-voltage characteristics of GaAs metal-oxide-semiconductor capacitors with Al2O3 gate dielectric
inferred← citeshttps://doi.org/10.1063/1.2775048openalex-snapshot
Optimization of electrical characteristics of TiO2-incorporated HfO2 n-type doped gallium arsenide metal oxide semiconductor capacitor with silicon interface passivation layer
inferred← citeshttps://doi.org/10.1063/1.2790780openalex-snapshot
Temperature effects of Si interface passivation layer deposition on high-k III-V metal-oxide-semiconductor characteristics
inferred← citeshttps://doi.org/10.1063/1.2795802openalex-snapshot
Metal-oxide-semiconductor capacitors on GaAs with germanium nitride passivation layer
inferred← citeshttps://doi.org/10.1063/1.2806190openalex-snapshot
GaAs metal-oxide-semiconductor capacitors using atomic layer deposition of HfO2 gate dielectric: Fabrication and characterization
inferred← citeshttps://doi.org/10.1063/1.2817742openalex-snapshot
Ga 2 O 3 ( Gd 2 O 3 ) ∕ Si 3 N 4 dual-layer gate dielectric for InGaAs enhancement mode metal-oxide-semiconductor field-effect transistor with channel inversion
inferred← citeshttps://doi.org/10.1063/1.2840132openalex-snapshot
Characterization of sputtered TiO2 gate dielectric on aluminum oxynitride passivated p-GaAs
inferred← citeshttps://doi.org/10.1063/1.2844879openalex-snapshot
Metal gate: HfO2 metal-oxide-semiconductor structures on high-indium-content InGaAs substrate using physical vapor deposition
inferred← citeshttps://doi.org/10.1063/1.2917823openalex-snapshot
Influence of the substrate orientation on the electrical and material properties of GaAs metal-oxide-semiconductor capacitors and self-aligned transistors using HfO2 and silicon interface passivation layer
inferred← citeshttps://doi.org/10.1063/1.2918835openalex-snapshot
1 nm equivalent oxide thickness in Ga2O3(Gd2O3)∕In0.2Ga0.8As metal-oxide-semiconductor capacitors
inferred← citeshttps://doi.org/10.1063/1.2920438openalex-snapshot
Self-aligned n-channel metal-oxide-semiconductor field effect transistor on high-indium-content In0.53Ga0.47As and InP using physical vapor deposition HfO2 and silicon interface passivation layer
inferred← citeshttps://doi.org/10.1063/1.2937404openalex-snapshot
Chemical and physical interface studies of the atomic-layer-deposited Al2O3 on GaAs substrates
inferred← citeshttps://doi.org/10.1063/1.2961003openalex-snapshot
S passivation of GaAs and band bending reduction upon atomic layer deposition of HfO2/Al2O3 nanolaminates
inferred← citeshttps://doi.org/10.1063/1.2961119openalex-snapshot
Hf O 2 -based InP n-channel metal-oxide-semiconductor field-effect transistors and metal-oxide-semiconductor capacitors using a germanium interfacial passivation layer
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A study of metal-oxide-semiconductor capacitors on GaAs, In0.53Ga0.47As, InAs, and InSb substrates using a germanium interfacial passivation layer
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High mobility HfO2-based In0.53Ga0.47As n-channel metal-oxide-semiconductor field effect transistors using a germanium interfacial passivation layer
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Performance enhancement of n-channel inversion type InxGa1−xAs metal-oxide-semiconductor field effect transistor using ex situ deposited thin amorphous silicon layer
inferred← citeshttps://doi.org/10.1063/1.3068752openalex-snapshot
A high performance In0.53Ga0.47As metal-oxide-semiconductor field effect transistor with silicon interface passivation layer
inferred← citeshttps://doi.org/10.1063/1.3079409openalex-snapshot
HfO x N y gate dielectric on p-GaAs
inferred← citeshttps://doi.org/10.1063/1.4818000openalex-snapshot
Improved interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with HfTiON as gate dielectric and TaON as passivation interlayer
inferred← citeshttps://doi.org/10.1088/0268-1242/25/12/125009openalex-snapshot
Thermal stability of HfOxNygate dielectrics on p-GaAs substrates
inferred← citeshttps://doi.org/10.1088/0268-1242/25/5/055006openalex-snapshot
A comparative study of amorphous InGaZnO thin-film transistors with HfOxNyand HfO2gate dielectrics
inferred← citeshttps://doi.org/10.1109/csics.2008.30openalex-snapshot
Charge Trapping and Wearout Characteristics of Self-Aligned Enhancement-Mode GaAs n-MOSFET with Si Interface Passivation Layer and HfO2 Gate Oxide
inferred← citeshttps://doi.org/10.1109/edssc.2008.4760751openalex-snapshot
InGaAs and graphene as high mobility channels for post Si-CMOS applications
inferred← citeshttps://doi.org/10.1109/edssc.2009.5394280openalex-snapshot
Study on electrical characteristics of amorphous InGaZnO MOS capacitors with High κ HfOxNy gate dielectric
inferred← citeshttps://doi.org/10.1109/iciev.2012.6317396openalex-snapshot
Interfacial characterization and reliability issues of high-k gate dielectrics on GaAs substrate for MOSFET applications
inferred← citeshttps://doi.org/10.1109/icsict.2008.4734821openalex-snapshot
High-performance III-V MOSFETs enabled by atomic layer deposition
inferred← citeshttps://doi.org/10.1109/iedm.2006.346742openalex-snapshot
Self-Aligned n- and p-channel GaAs MOSFETs on Undoped and P-type Substrates Using HfO2 and Silicon Interface Passivation Layer
inferred← citeshttps://doi.org/10.1109/rtp.2007.4383820openalex-snapshot
New Tool and New Process for Ultra High Performance for Metal/High-K Gate Dielectric Stack for Sub-45 nm CMOS Manufacturing
inferred← citeshttps://doi.org/10.1109/tdmr.2016.2614006openalex-snapshot
Using Ge-Doped La-Oxynitride as Interfacial Passivation Layer for GaAs Metal-Oxide-Semiconductor Capacitors
inferred← citeshttps://doi.org/10.1109/ted.2007.900678openalex-snapshot
Simplified Surface Preparation for GaAs Passivation Using Atomic Layer-Deposited High- $\kappa$ Dielectrics
inferred← citeshttps://doi.org/10.1109/ted.2007.901261openalex-snapshot
Electrical and Interfacial Characterization of Atomic Layer Deposited High- $\kappa$ Gate Dielectrics on GaAs for Advanced CMOS Devices
inferred← citeshttps://doi.org/10.1109/ted.2010.2059029openalex-snapshot
Impact of Semiconductor and Interface-State Capacitance on Metal/High-k/GaAs Capacitance–Voltage Characteristics
inferred← citeshttps://doi.org/10.1109/ted.2012.2226243openalex-snapshot
Impact of Buffer Layer on Atomic Layer Deposited TiAlO Alloy Dielectric Quality for Epitaxial-GaAs/Ge Device Application
inferred← citeshttps://doi.org/10.1109/ted.2014.2297995openalex-snapshot
Electrical Properties of HfTiON Gate-Dielectric GaAs Metal-Oxide-Semiconductor Capacitor With AlON as Interlayer
inferred← citeshttps://doi.org/10.1109/ted.2018.2802490openalex-snapshot
Ultrathin Vapor–Liquid–Solid Grown Titanium Dioxide-II Film on Bulk GaAs Substrates for Advanced Metal–Oxide–Semiconductor Device Applications
inferred← citeshttps://doi.org/10.1116/1.2746348openalex-snapshot
Metal gate HfO2 metal-oxide-semiconductor structures on InGaAs substrate with varying Si interface passivation layer and postdeposition anneal condition
inferred← citeshttps://doi.org/10.1116/1.2750344openalex-snapshot
Formation of ultrathin SiNx∕Si interface control double layer on (001) and (111) GaAs surfaces for ex situ deposition of high-k dielectrics
inferred← citeshttps://doi.org/10.1116/1.2835061openalex-snapshot
Fabrication and characterization of metal-oxide-semiconductor GaAs capacitors on Ge∕Si1−xGex∕Si substrates with Al2O3 gate dielectric
inferred← citeshttps://doi.org/10.1116/1.2884739openalex-snapshot
Oxide scalability in Al2O3∕Ga2O3(Gd2O3)∕In0.20Ga0.80As∕GaAs heterostructures
inferred← citeshttps://doi.org/10.1116/1.2890708openalex-snapshot
Optimization of electrical characteristics of gadolinium (Gd2O3) incorporated HfO2 GaAs n-type metal-oxide semiconductor capacitors with silicon-interface-passivation layer
inferred← citeshttps://doi.org/10.1116/1.2905246openalex-snapshot
Main determinants for III–V metal-oxide-semiconductor field-effect transistors (invited)
inferred← citeshttps://doi.org/10.1116/1.4927483openalex-snapshot
Passivation of oxide traps in gallium arsenide (semiconductor) metal-oxide-semiconductor capacitor with high-k dielectric by using fluorine incorporation
inferred← citeshttps://doi.org/10.1143/apex.5.021104openalex-snapshot
Effect of Postdeposition Annealing Temperatures on Electrical Characteristics of Molecular-Beam-Deposited HfO$_{2}$ on n-InAs/InGaAs Metal–Oxide–Semiconductor Capacitors
inferred← citeshttps://doi.org/10.1149/1.2768288openalex-snapshot
In Situ Silane Passivation of Gallium Arsenide and Deposition of High-Permittivity Gate Dielectric for MOS Applications
inferred← citeshttps://doi.org/10.1149/1.3074298openalex-snapshot
Effects of Anneal and Silicon Interface Passivation Layer Thickness on Device Characteristics of In[sub 0.53]Ga[sub 0.47]As Metal-Oxide-Semiconductor Field-Effect Transistors
inferred← citeshttps://doi.org/10.1149/1.3453935openalex-snapshot
Interfacial and Electrical Characterization of Atomic-Layer-Deposited HfO[sub 2] Gate Dielectric on High Mobility Epitaxial GaAs/Ge Channel Substrates
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Experimental Demonstration of (111)-Oriented GaAs Metal–Oxide–Semiconductor Field-Effect-Transistors with Hetero-Epitaxial Ge Source/Drain
inferred← citeshttps://doi.org/10.1149/2162-8777/ac2782openalex-snapshot
Characteristics of In 0.7 Ga 0.3 As MOS Capacitors with Sulfur and Hydrazine Pretreatments
inferred← citeshttps://doi.org/10.1186/1556-276x-7-99openalex-snapshot
Characterization of epitaxial GaAs MOS capacitors using atomic layer-deposited TiO2/Al2O3 gate stack: study of Ge auto-doping and p-type Zn doping
inferred← citeshttps://doi.org/10.1557/mrs2009.136openalex-snapshot
Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials
inferred← citeshttps://doi.org/10.3390/coatings9040217openalex-snapshot
Advances in La-Based High-k Dielectrics for MOS Applications
inferred← citeshttps://doi.org/10.70675/4ed38cc4zd06ez44a4z92c6z064cfae4a2e4openalex-snapshot
Fabrication et caractérisation des transistors à effet de champ de la filière III-V pour applications basse consommation
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