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Speculative Parallelization in Decoupled Look-ahead
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/hpca.1998.650541openalex-snapshot
The potential for using thread-level data speculation to facilitate automatic parallelization
inferredcites →https://doi.org/10.1109/hpca.1998.650559openalex-snapshot
Speculative versioning cache
inferredcites →https://doi.org/10.1109/hpca.2001.903250openalex-snapshot
Speculative data-driven multithreading
inferredcites →https://doi.org/10.1109/hpca.2003.1183532openalex-snapshot
Runahead execution: an alternative to very large instruction windows for out-of-order processors
inferredcites →https://doi.org/10.1109/hpca.2005.9openalex-snapshot
Checkpointed early load retirement
inferredcites →https://doi.org/10.1109/isca.1994.288164openalex-snapshot
Evaluating stream buffers as a secondary cache replacement
inferredcites →https://doi.org/10.1109/isca.1999.765950openalex-snapshot
Simultaneous subordinate microthreading (SSMT)
inferredcites →https://doi.org/10.1109/isca.2000.854373openalex-snapshot
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
inferredcites →https://doi.org/10.1109/isca.2001.937426openalex-snapshot
Execution-based prediction using speculative slices
inferredcites →https://doi.org/10.1109/isca.2001.937427openalex-snapshot
Speculative precomputation: long-range prefetching of delinquent loads
inferredcites →https://doi.org/10.1109/isca.2006.31openalex-snapshot
Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs
inferredcites →https://doi.org/10.1109/l-ca.2004.3openalex-snapshot
CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction
inferredcites →https://doi.org/10.1109/micro.1998.742769openalex-snapshot
Dataflow analysis of branch mispredictions and its application to early resolution of branch outcomes
inferredcites →https://doi.org/10.1109/micro.1998.742784openalex-snapshot
A dynamic multithreading processor
inferredcites →https://doi.org/10.1109/micro.2002.1176241openalex-snapshot
Master/Slave Speculative Parallelization
inferredcites →https://doi.org/10.1109/micro.2003.1253243openalex-snapshot
Beating in-order stalls with "flea-flicker" two-pass pipelining
inferredcites →https://doi.org/10.1109/micro.2007.13openalex-snapshot
Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs
inferredcites →https://doi.org/10.1109/micro.2007.23openalex-snapshot
Effective Optimistic-Checker Tandem Core Design through Architectural Pruning
inferredcites →https://doi.org/10.1109/micro.2008.4771800openalex-snapshot
A performance-correctness explicitly-decoupled architecture
inferredcites →https://doi.org/10.1109/mm.2005.49openalex-snapshot
High-Performance Throughput Computing
inferredcites →https://doi.org/10.1109/mm.2006.11openalex-snapshot
Energy-Efficient Thread-Level Speculation
inferredcites →https://doi.org/10.1109/pact.2005.18openalex-snapshot
Dual-core execution: building a highly scalable single-thread instruction window
inferredcites →https://doi.org/10.1109/pact.2007.52openalex-snapshot
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
inferredcites →https://doi.org/10.1145/1111583.1111591openalex-snapshot
On the importance of optimizing the configuration of stream prefetchers
inferredcites →https://doi.org/10.1145/1542275.1542333openalex-snapshot
Combining thread level speculation helper threads and runahead execution
inferredcites →https://doi.org/10.1145/1555754.1555814openalex-snapshot
Simultaneous speculative threading
inferredcites →https://doi.org/10.1145/191995.192014openalex-snapshot
Evaluating stream buffers as a secondary cache replacement
inferredcites →https://doi.org/10.1145/2591635.2667173openalex-snapshot
Improving data cache performance by pre-executing instructions under a cache miss
inferredcites →https://doi.org/10.1145/263580.263597openalex-snapshot
Improving data cache performance by pre-executing instructions under a cache miss
inferredcites →https://doi.org/10.1145/268806.268810openalex-snapshot
The SimpleScalar tool set, version 2.0
inferredcites →https://doi.org/10.1145/300979.300995openalex-snapshot
Simultaneous subordinate microthreading (SSMT)
inferredcites →https://doi.org/10.1145/339647.363382openalex-snapshot
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
inferredcites →https://doi.org/10.1145/360128.360155openalex-snapshot
A study of slipstream processors
inferredcites →https://doi.org/10.1145/379240.379246openalex-snapshot
Execution-based prediction using speculative slices
inferredcites →https://doi.org/10.1145/379240.379250openalex-snapshot
Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors
inferredcites →https://doi.org/10.1145/379240.379251openalex-snapshot
Data prefetching by dependence graph precomputation
inferredcites →https://doi.org/10.5555/290940.290960openalex-snapshot
Dataflow analysis of branch mispredictions and its application to early resolution of branch outcomes
inferredcites →https://doi.org/10.5555/290940.290988openalex-snapshot
A dynamic multithreading processor
inferredcites →https://doi.org/10.5555/774861.774871openalex-snapshot
Master/Slave Speculative Parallelization
inferredcites →https://doi.org/10.5555/956417.956557openalex-snapshot
Beating in-order stalls with "flea-flicker" two-pass pipelining
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1109/hpca.2014.6835974openalex-snapshot
Accelerating decoupled look-ahead via weak dependence removal: A metaheuristic approach
inferred← citeshttps://doi.org/10.1109/hpca.2019.00064openalex-snapshot
R3-DLA (Reduce, Reuse, Recycle): A More Efficient Approach to Decoupled Look-Ahead Architectures
inferred← citeshttps://doi.org/10.1109/hpca47549.2020.00040openalex-snapshot
Precise Runahead Execution
inferred← citeshttps://doi.org/10.1109/pact.2015.55openalex-snapshot
Load Balancing in Decoupled Look-ahead: A Do-It-Yourself (DIY) Approach
inferred← citeshttps://doi.org/10.1109/pact.2017.35openalex-snapshot
DRUT: An Efficient Turbo Boost Solution via Load Balancing in Decoupled Look-Ahead Architecture
inferred← citeshttps://doi.org/10.1145/2355585.2355591openalex-snapshot
Mixed speculative multithreaded execution models
inferred← citeshttps://doi.org/10.1145/3170433openalex-snapshot
A Case for a More Effective, Power-Efficient Turbo Boosting
inferred← citeshttps://doi.org/10.5281/zenodo.14011630openalex-snapshot
Improving the performance of a thread-level speculation library
inferred← citeshttps://doi.org/10.70675/c7c2b786z3986z4edez945fzcd4d3a382f16openalex-snapshot
Exploiting heterogeneous many cores on sequential code
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