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Optimizing Data Allocation for Loops on Embedded Systems with Scratch-Pad Memory
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/54.922799openalex-snapshot
Embedded DRAM development: Technology, physical design, and application issues
inferredcites →https://doi.org/10.1109/codes.2002.1003604openalex-snapshot
Scratchpad memory: a design alternative for cache on-chip memory in embedded systems
inferredcites →https://doi.org/10.1109/date.2005.97openalex-snapshot
Compiler-Based Approach for Exploiting Scratch-Pad in Presence of Irregular Array Access
inferredcites →https://doi.org/10.1109/date.2006.243810openalex-snapshot
Dynamic Scratch-Pad Memory Management for Irregular Array Access Patterns
inferredcites →https://doi.org/10.1109/date.2011.5763127openalex-snapshot
Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory
inferredcites →https://doi.org/10.1109/edtc.1997.582323openalex-snapshot
Efficient utilization of scratch-pad memory in embedded processor applications
inferredcites →https://doi.org/10.1109/isqed.2006.115openalex-snapshot
Shared Scratch-Pad Memory Space Management
inferredcites →https://doi.org/10.1109/isqed.2008.4479830openalex-snapshot
A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm
inferredcites →https://doi.org/10.1109/sasp.2010.5521139openalex-snapshot
Minimizing write activities to non-volatile memory via scheduling and recomputation
inferredcites →https://doi.org/10.1109/tsp.2012.2189768openalex-snapshot
Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling
inferredcites →https://doi.org/10.1109/vlsisoc.2010.5642609openalex-snapshot
Optimal scheduling to minimize non-volatile memory access time with hardware cache
inferredcites →https://doi.org/10.1145/1151074.1151085openalex-snapshot
Dynamic allocation for scratch-pad memory using compile-time decisions
inferredcites →https://doi.org/10.1145/1837274.1837363openalex-snapshot
Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation
inferredcites →https://doi.org/10.1145/502217.502221openalex-snapshot
Storage allocation for embedded processors
inferredcites →https://doi.org/10.1145/581888.581891openalex-snapshot
An optimal memory allocation scheme for scratch-pad-based embedded systems
inferredcites →https://doi.org/10.1145/951710.951747openalex-snapshot
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
inferredcites →https://doi.org/10.1145/951746.951747openalex-snapshot
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
inferredcites →https://doi.org/10.3233/emc-2005-00051openalex-snapshot
Heap data allocation to scratch-pad memory in embedded systems
inferredcites →https://doi.org/10.5555/787260.787762openalex-snapshot
Efficient utilization of scratch-pad memory in embedded processor applications
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s11265-013-0754-2openalex-snapshot
Loop Transforming for Reducing Data Alignment on Multi-Core SIMD Processors
inferred← citeshttps://doi.org/10.1016/j.jpdc.2016.11.014openalex-snapshot
Energy-aware scheduling on heterogeneous multi-core systems with guaranteed probability
inferred← citeshttps://doi.org/10.1016/j.sysarc.2021.102145openalex-snapshot
Optimizing the data placement and scheduling on multi-port DWM in multi-core embedded system
inferred← citeshttps://doi.org/10.1109/bigdatasecurity.2017.45openalex-snapshot
Optimizing Task Assignment with Minimum Cost on Heterogeneous Embedded Multicore Systems Considering Time Constraint
inferred← citeshttps://doi.org/10.1109/hpca53966.2022.00030openalex-snapshot
DRIPS: Dynamic Rebalancing of Pipelined Streaming Applications on CGRAs
inferred← citeshttps://doi.org/10.1109/hpcc-css-icess.2015.126openalex-snapshot
Optimizing Tasks Assignment on Heterogeneous Multi-core Real-Time Systems with Minimum Energy
inferred← citeshttps://doi.org/10.1109/hpcc/smartcity/dss.2019.00205openalex-snapshot
Wear-Leveling Aware Data Allocation for Chip Multiprocessors with Non-Volatile Memory
inferred← citeshttps://doi.org/10.1109/icassp.2013.6638129openalex-snapshot
Efficient task assignment and scheduling for MPSoC DSPS with VS-SPM considering concurrent accesses through data allocation
inferred← citeshttps://doi.org/10.1109/tpds.2014.2356194openalex-snapshot
Optimizing Task and Data Assignment on Multi-Core Systems with Multi-Port SPMs
inferred← citeshttps://doi.org/10.11591/ijres.v6.i2.pp69-81openalex-snapshot
Software and Hardware for managing Scratch Pad Memory
inferred← citeshttps://doi.org/10.4304/jcp.9.5.1066-1076openalex-snapshot
Optimizing Data Distribution for Loops on Embedded Multicore with Scratch-Pad Memory
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