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Real-Time Control of I/O COTS Peripherals for Embedded Systems

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-1-4614-0676-1openalex-snapshot
Hard Real-Time Computing Systems
inferredcites →https://doi.org/10.1007/bf02341920openalex-snapshot
Aperiodic task scheduling for Hard-Real-Time systems
inferredcites →https://doi.org/10.1007/s10009-006-0019-5openalex-snapshot
System architecture evaluation using modular performance analysis: a case study
inferredcites →https://doi.org/10.1016/b978-155860702-6/50016-8openalex-snapshot
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
inferredcites →https://doi.org/10.1016/s0898-1221(98)90205-xopenalex-snapshot
Hard real-time computing systems: Predictable scheduling algorithms and applications
inferredcites →https://doi.org/10.1109/62.199819openalex-snapshot
SAFEbus (for avionics)
inferredcites →https://doi.org/10.1109/date.2003.1253607openalex-snapshot
A general framework for analysing system properties in platform-based embedded system designs
inferredcites →https://doi.org/10.1109/iceccs.2009.31openalex-snapshot
ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs
inferredcites →https://doi.org/10.1109/icpads.1996.517590openalex-snapshot
Allowing cycle-stealing direct memory access I/O concurrent with hard-real-time programs
inferredcites →https://doi.org/10.1109/iiswc.2005.1525998openalex-snapshot
A performance characterization of high definition digital video decoding using H.264/AVC
inferredcites →https://doi.org/10.1109/iscas.2000.858698openalex-snapshot
Real-time calculus for scheduling hard real-time systems
inferredcites →https://doi.org/10.1109/real.1989.63567openalex-snapshot
The rate monotonic scheduling algorithm: exact characterization and average case behavior
inferredcites →https://doi.org/10.1109/real.1994.342710openalex-snapshot
Analysing real-time communications: controller area network (CAN)
inferredcites →https://doi.org/10.1109/real.1994.342735openalex-snapshot
Efficient aperiodic service under earliest deadline scheduling
inferredcites →https://doi.org/10.1109/real.2003.1253290openalex-snapshot
Impact of PCI bus load on applications in a PC architecture
inferredcites →https://doi.org/10.1109/rtss.2007.13openalex-snapshot
Distributed Minimal Time Convergecast Scheduling for Small or Sparse Data Sources
inferredcites →https://doi.org/10.1109/rtss.2007.15openalex-snapshot
Toward the Predictable Integration of Real-Time COTS Based Systems
inferredcites →https://doi.org/10.1109/rtss.2007.24openalex-snapshot
Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
inferredcites →https://doi.org/10.1109/rtss.2007.51openalex-snapshot
Static Scheduling and Software Synthesis for Dataflow Graphs with Symbolic Model-Checking
inferredcites →https://doi.org/10.1109/rtss.2008.42openalex-snapshot
Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems
inferredcites →https://doi.org/10.1145/1450135.1450172openalex-snapshot
Reliable performance analysis of a multicore multithreaded system-on-chip
inferredcites →https://doi.org/10.1145/321738.321743openalex-snapshot
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
inferredcites →https://doi.org/10.21236/ada211344openalex-snapshot
Scheduling Sporadic and Aperiodic Events in a Hard Real-Time System

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.2139/ssrn.4577590openalex-extracted
inferred← citeshttps://doi.org/10.1002/spe.3053openalex-snapshot
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
inferred← citeshttps://doi.org/10.1016/j.sysarc.2024.103158openalex-snapshot
Timing-accurate scheduling and allocation for parallel I/O operations in real-time systems
inferred← citeshttps://doi.org/10.1109/dasc.2010.5655464openalex-snapshot
Exploring the design space of IMA system architectures
inferred← citeshttps://doi.org/10.1109/dsd.2015.100openalex-snapshot
Mixed-Criticality Embedded Systems -- A Balance Ensuring Partitioning and Performance
inferred← citeshttps://doi.org/10.1109/ecrts.2013.28openalex-snapshot
A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.1109/hpcc-css-icess.2015.221openalex-snapshot
IOMPU: Spatial Separation for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non-transparent Bridges
inferred← citeshttps://doi.org/10.1109/isie.2017.8001432openalex-snapshot
Towards predictable execution model on ARM-based heterogeneous platforms
inferred← citeshttps://doi.org/10.1109/prdc.2013.51openalex-snapshot
Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms
inferred← citeshttps://doi.org/10.1109/rtas.2011.33openalex-snapshot
A Predictable Execution Model for COTS-Based Embedded Systems
inferred← citeshttps://doi.org/10.1109/rtas.2015.7108452openalex-snapshot
Memory efficient global scheduling of real-time tasks
inferred← citeshttps://doi.org/10.1109/rtas52030.2021.00032openalex-snapshot
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems
inferred← citeshttps://doi.org/10.1109/rtcsa.2014.6910515openalex-snapshot
Light-PREM: Automated software refactoring for predictable execution on COTS embedded systems
inferred← citeshttps://doi.org/10.1109/rtcsa.2014.6910557openalex-snapshot
Performance isolation for real-time systems with Xen hypervisor on multi-cores
inferred← citeshttps://doi.org/10.1109/tc.2011.202openalex-snapshot
Real-Time I/O Management System with COTS Peripherals
inferred← citeshttps://doi.org/10.1109/tc.2015.2500572openalex-snapshot
Global Real-Time Memory-Centric Scheduling for Multicore Systems
inferred← citeshttps://doi.org/10.1145/3229631.3229642openalex-snapshot
CHIPS-AHOy
inferred← citeshttps://doi.org/10.17485/ijst/2016/v9i1/85757openalex-snapshot
Design and Analysis of RTOs based Reconfigurable Cots Design on FPGA
inferred← citeshttps://doi.org/10.4230/oasics.wcet.2015.75openalex-snapshot
Bare-Metal Execution of Hard Real-Time Tasks Within a General-Purpose Operating System
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