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Investigation of Scratchpad Memory for Preemptive Multitasking
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-642-19137-4_11openalex-snapshot
A Dynamic Instruction Scratchpad Memory for Embedded Processors Managed by Hardware
inferredcites →https://doi.org/10.1007/bf00365393openalex-snapshot
Stack-based scheduling of realtime processes
inferredcites →https://doi.org/10.1007/s11241-005-0507-9openalex-snapshot
Measuring the Performance of Schedulability Tests
inferredcites →https://doi.org/10.1007/s11241-007-9012-7openalex-snapshot
Controller Area Network (CAN) schedulability analysis: Refuted, revisited and revised
inferredcites →https://doi.org/10.1007/s11241-011-9129-6openalex-snapshot
Making DRAM refresh predictable
inferredcites →https://doi.org/10.1007/s11241-012-9152-2openalex-snapshot
Improved cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems
inferredcites →https://doi.org/10.1016/j.sysarc.2010.08.006openalex-snapshot
Cache-related preemption delay via useful cache blocks: Survey and redefinition
inferredcites →https://doi.org/10.1049/sej.1993.0034openalex-snapshot
Applying new scheduling theory to static priority pre-emptive scheduling
inferredcites →https://doi.org/10.1109/12.40842openalex-snapshot
Evaluating associativity in CPU caches
inferredcites →https://doi.org/10.1109/12.689649openalex-snapshot
Analysis of cache-related preemption delay in fixed-priority preemptive scheduling
inferredcites →https://doi.org/10.1109/date.2002.998306openalex-snapshot
Assigning program and data objects to scratchpad for energy reduction
inferredcites →https://doi.org/10.1109/date.2007.364510openalex-snapshot
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
inferredcites →https://doi.org/10.1109/date.2010.5456977openalex-snapshot
Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems
inferredcites →https://doi.org/10.1109/ecrts.2005.26openalex-snapshot
Scheduling Analysis of Real-Time Systems with Precise Modeling of Cache Related Preemption Delay
inferredcites →https://doi.org/10.1109/ecrts.2010.21openalex-snapshot
Investigating Average versus Worst-Case Timing Behavior of Data Caches and Data Scratchpads
inferredcites →https://doi.org/10.1109/estmed.2005.1518087openalex-snapshot
Scratchpad sharing strategies for multiprocess embedded systems: a first approach
inferredcites →https://doi.org/10.1109/rtas.2012.19openalex-snapshot
Explicit Reservation of Local Memory in a Predictable, Preemptive Multitasking Real-Time System
inferredcites →https://doi.org/10.1109/rtss.2005.45openalex-snapshot
WCET Centric Data Allocation to Scratchpad Memory
inferredcites →https://doi.org/10.1109/rtss.2011.31openalex-snapshot
Cache Related Pre-emption Delay Aware Response Time Analysis for Fixed Priority Pre-emptive Systems
inferredcites →https://doi.org/10.1109/rttas.1996.509537openalex-snapshot
Adding instruction cache effect to schedulability analysis of preemptive real-time systems
inferredcites →https://doi.org/10.1109/tc.2008.66openalex-snapshot
Efficient Exact Schedulability Tests for Fixed Priority Real-Time Systems
inferredcites →https://doi.org/10.1109/tcad.2009.2013287openalex-snapshot
Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems
inferredcites →https://doi.org/10.1145/1210268.1210275openalex-snapshot
Timing analysis for preemptive multitasking real-time systems with caches
inferredcites →https://doi.org/10.1145/1324969.1324973openalex-snapshot
Data cache locking for tight timing calculations
inferredcites →https://doi.org/10.1145/1450095.1450117openalex-snapshot
Predictable programming on a precision timed architecture
inferredcites →https://doi.org/10.1147/rd.494.0589openalex-snapshot
Introduction to the Cell multiprocessor
inferredcites →https://doi.org/10.4230/oasics.wcet.2010.136openalex-snapshot
The Mälardalen WCET Benchmarks: Past, Present And Future
inferredcites →https://doi.org/10.5555/882452.874376openalex-snapshot
Assigning Program and Data Objects to Scratchpad for Energy Reduction
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-319-30695-7_11openalex-snapshot
Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments
inferred← citeshttps://doi.org/10.1007/s11241-017-9285-4openalex-snapshot
An extensible framework for multicore response time analysis
inferred← citeshttps://doi.org/10.1007/s11241-019-09340-0openalex-snapshot
A real-time scratchpad-centric OS with predictable inter/intra-core communication for multi-core embedded systems
inferred← citeshttps://doi.org/10.1109/ecrts.2013.28openalex-snapshot
A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.1109/rtas.2014.6925992openalex-snapshot
Hiding memory latency using fixed priority scheduling
inferred← citeshttps://doi.org/10.1109/rtas.2016.7461321openalex-snapshot
A Real-Time Scratchpad-Centric OS for Multi-Core Embedded Systems
inferred← citeshttps://doi.org/10.1109/rtas.2018.00024openalex-snapshot
Mixed Criticality Systems with Varying Context Switch Costs
inferred← citeshttps://doi.org/10.1109/tetc.2015.2398824openalex-snapshot
Data Allocation for Hybrid Memory With Genetic Algorithm
inferred← citeshttps://doi.org/10.1109/tpds.2013.2297308openalex-snapshot
Real-Time Task Scheduling on Island-Based Multi-Core Platforms
inferred← citeshttps://doi.org/10.1145/2597457.2597458openalex-snapshot
A review of fixed priority and EDF scheduling for hard real-time uniprocessor systems
inferred← citeshttps://doi.org/10.1145/2834848.2834862openalex-snapshot
A generic and compositional framework for multicore response time analysis
inferred← citeshttps://doi.org/10.1145/2997465.2997488openalex-snapshot
A Software Managed Stack Cache for Real-Time Systems
inferred← citeshttps://doi.org/10.1145/3587694openalex-snapshot
Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs
inferred← citeshttps://doi.org/10.3850/9783981537079_1013openalex-snapshot
Lessons Learned from the EU Project T-CREST
inferred← citeshttps://doi.org/10.70675/714cfccfz5715z4059zacfbzdf7c8d93a2d1openalex-snapshot
Minimising shared resource contention when scheduling real-time applications on multi-core architectures
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