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Explicit Reservation of Local Memory in a Predictable, Preemptive Multitasking Real-Time System
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/bf00365393openalex-snapshot
Stack-based scheduling of realtime processes
inferredcites →https://doi.org/10.1109/12.57058openalex-snapshot
Priority inheritance protocols: an approach to real-time synchronization
inferredcites →https://doi.org/10.1109/12.752656openalex-snapshot
An algorithm for optimally exploiting spatial and temporal locality in upper memory levels
inferredcites →https://doi.org/10.1109/ecrts.2007.37openalex-snapshot
WCET-Directed Dynamic Scratchpad Memory Allocation of Data
inferredcites →https://doi.org/10.1109/jproc.2003.814618openalex-snapshot
The influence of processor architecture on the design and the results of WCET tools
inferredcites →https://doi.org/10.1109/rtas.2006.14openalex-snapshot
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
inferredcites →https://doi.org/10.1109/rtss.2011.31openalex-snapshot
Cache Related Pre-emption Delay Aware Response Time Analysis for Fixed Priority Pre-emptive Systems
inferredcites →https://doi.org/10.1109/rttas.1996.509537openalex-snapshot
Adding instruction cache effect to schedulability analysis of preemptive real-time systems
inferredcites →https://doi.org/10.1109/tcad.2009.2013287openalex-snapshot
Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems
inferredcites →https://doi.org/10.1145/1151074.1151085openalex-snapshot
Dynamic allocation for scratch-pad memory using compile-time decisions
inferredcites →https://doi.org/10.1145/1289881.1289917openalex-snapshot
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking systems
inferredcites →https://doi.org/10.1145/1347375.1347389openalex-snapshot
The worst-case execution-time problem—overview of methods and survey of tools
inferredcites →https://doi.org/10.1145/1629335.1629371openalex-snapshot
Implementing time-predictable load and store operations
inferredcites →https://doi.org/10.1145/216633.216677openalex-snapshot
Compiler support for software-based cache partitioning
inferredcites →https://doi.org/10.1145/216636.216677openalex-snapshot
Compiler support for software-based cache partitioning
inferredcites →https://doi.org/10.1145/378239.379049openalex-snapshot
Dynamic management of scratch-pad memory space
inferredcites →https://doi.org/10.1145/997163.997184openalex-snapshot
Measuring the cache interference cost in preemptive real-time systems
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-319-30695-7_11openalex-snapshot
Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments
inferred← citeshttps://doi.org/10.1007/s11241-017-9275-6openalex-snapshot
Online and offline scheduling with cache-related preemption delays
inferred← citeshttps://doi.org/10.1007/s11241-019-09340-0openalex-snapshot
A real-time scratchpad-centric OS with predictable inter/intra-core communication for multi-core embedded systems
inferred← citeshttps://doi.org/10.1109/ecrts.2013.28openalex-snapshot
A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.1109/etfa.2014.7005198openalex-snapshot
Temporal isolation with preemption delay accounting
inferred← citeshttps://doi.org/10.1109/isorc.2014.48openalex-snapshot
WCET-Based Comparison of an Instruction Scratchpad and a Method Cache
inferred← citeshttps://doi.org/10.1109/rtas.2014.6925992openalex-snapshot
Hiding memory latency using fixed priority scheduling
inferred← citeshttps://doi.org/10.1109/rtas.2014.6925997openalex-snapshot
Selfish-LRU: Preemption-aware caching for predictability and performance
inferred← citeshttps://doi.org/10.1109/rtas.2016.7461321openalex-snapshot
A Real-Time Scratchpad-Centric OS for Multi-Core Embedded Systems
inferred← citeshttps://doi.org/10.1109/rtas.2017.1openalex-snapshot
A Reliable and Predictable Scratchpad-centric OS for Multi-core Embedded Systems
inferred← citeshttps://doi.org/10.1109/rtcsa.2014.6910503openalex-snapshot
A context aware cache controller to bridge the gap between theory and practice in real-time systems
inferred← citeshttps://doi.org/10.1109/rtss.2012.54openalex-snapshot
Investigation of Scratchpad Memory for Preemptive Multitasking
inferred← citeshttps://doi.org/10.1109/tc.2016.2614819openalex-snapshot
Exact Response Time Analysis for Fixed Priority Memory-Processor Co-Scheduling
inferred← citeshttps://doi.org/10.1145/2523070openalex-snapshot
Explicit reservation of cache memory in a predictable, preemptive multitasking real-time system
inferred← citeshttps://doi.org/10.1145/2830555openalex-snapshot
A Survey on Cache Management Mechanisms for Real-Time Embedded Systems
inferred← citeshttps://doi.org/10.1145/2834848.2834854openalex-snapshot
Memory-processor co-scheduling in fixed priority systems
inferred← citeshttps://doi.org/10.1145/3587694openalex-snapshot
Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs
inferred← citeshttps://doi.org/10.34626/hstm-w464openalex-snapshot
Real-time Limited Preemptive Scheduling
inferred← citeshttps://doi.org/10.70675/82225956z8862z4aeaz85f3z3f6eb0f5ac10openalex-snapshot
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