On the public citation graph
Spin detection hardware for improved management of multithreaded systems
0 signed · 82 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/2.471178openalex-snapshot
The Paradyn parallel performance measurement tool
inferredcites →https://doi.org/10.1109/2.982916openalex-snapshot
Simics: A full system simulation platform
inferredcites →https://doi.org/10.1109/40.653032openalex-snapshot
Starfire: extending the SMP envelope
inferredcites →https://doi.org/10.1109/hpca.1999.744326openalex-snapshot
Supporting fine-grained synchronization on a simultaneous multithreading processor
inferredcites →https://doi.org/10.1109/hpca.2004.10018openalex-snapshot
The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors
inferredcites →https://doi.org/10.1109/isca.1995.524546openalex-snapshot
The SPLASH-2 programs: characterization and methodological considerations
inferredcites →https://doi.org/10.1109/isca.1998.694761openalex-snapshot
An analysis of database workload performance on simultaneous multithreaded processors
inferredcites →https://doi.org/10.1109/isca.1998.694790openalex-snapshot
Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor
inferredcites →https://doi.org/10.1109/isca.2001.937452openalex-snapshot
Energy-effective issue logic
inferredcites →https://doi.org/10.1109/mc.2003.1178046openalex-snapshot
Simulating a $2M commercial server on a $2K PC
inferredcites →https://doi.org/10.1109/mc.2005.169openalex-snapshot
Rethinking the design of virtual machine monitors
inferredcites →https://doi.org/10.1109/mc.2005.239openalex-snapshot
Parallelism and the ARM instruction set architecture
inferredcites →https://doi.org/10.1109/mm.2004.1289290openalex-snapshot
IBM power5 chip: a dual-core multithreaded processor
inferredcites →https://doi.org/10.1109/pact.2003.1238019openalex-snapshot
Redeeming IPC as a performance metric for multithreaded programs
inferredcites →https://doi.org/10.1145/1048935.1050154openalex-snapshot
Efficient, Unified, and Scalable Performance Monitoring for Multiprocessor Operating Systems
inferredcites →https://doi.org/10.1145/1060289.1060307openalex-snapshot
Memory resource management in VMware ESX server
inferredcites →https://doi.org/10.1145/1060289.1060308openalex-snapshot
Scale and performance in the Denali isolation kernel
inferredcites →https://doi.org/10.1145/1105734.1105747openalex-snapshot
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
inferredcites →https://doi.org/10.1145/1165389.945462openalex-snapshot
Xen and the art of virtualization
inferredcites →https://doi.org/10.1145/121132.286599openalex-snapshot
Empirical studies of competitve spinning for a shared-memory multiprocessor
inferredcites →https://doi.org/10.1145/152864.152869openalex-snapshot
Waiting algorithms for synchronization in large-scale multiprocessors
inferredcites →https://doi.org/10.1145/232973.232982openalex-snapshot
Evaluation of design alternatives for a multiprocessor microprocessor
inferredcites →https://doi.org/10.1145/232974.232982openalex-snapshot
Evaluation of design alternatives for a multiprocessor microprocessor
inferredcites →https://doi.org/10.1145/235321.235323openalex-snapshot
Context constraints for compositional reachability analysis
inferredcites →https://doi.org/10.1145/237090.237140openalex-snapshot
The case for a single-chip multiprocessor
inferredcites →https://doi.org/10.1145/263326.263335openalex-snapshot
Eliminating receive livelock in an interrupt-driven kernel
inferredcites →https://doi.org/10.1145/279358.279367openalex-snapshot
An analysis of database workload performance on simultaneous multithreaded processors
inferredcites →https://doi.org/10.1145/279358.279399openalex-snapshot
Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor
inferredcites →https://doi.org/10.1145/357172.357178openalex-snapshot
Proving Liveness Properties of Concurrent Programs
inferredcites →https://doi.org/10.1145/511334.511349openalex-snapshot
Full-system timing-first simulation
inferredcites →https://doi.org/10.1145/511348.511349openalex-snapshot
Full-system timing-first simulation
inferredcites →https://doi.org/10.1145/781498.781504openalex-snapshot
Improving server software support for simultaneous multithreaded processors
inferredcites →https://doi.org/10.1145/844128.844146openalex-snapshot
Memory resource management in VMware ESX server
inferredcites →https://doi.org/10.1145/844128.844147openalex-snapshot
Scale and performance in the Denali isolation kernel
inferredcites →https://doi.org/10.1145/945445.945462openalex-snapshot
Xen and the art of virtualization
inferredcites →https://doi.org/10.1145/945461.945462openalex-snapshot
Xen and the art of virtualization
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/spe.922openalex-snapshot
Automated dynamic detection of busy–wait synchronizations
inferred← citeshttps://doi.org/10.1007/978-3-642-35632-2_3openalex-snapshot
Dynamic Livelock Analysis of Multi-threaded Programs
inferred← citeshttps://doi.org/10.1007/978-3-642-40047-6_3openalex-snapshot
Synchronization Identification through On-the-Fly Test
inferred← citeshttps://doi.org/10.1007/s00607-012-0236-6openalex-snapshot
Efficient inter-core power and thermal balancing for multicore processors
inferred← citeshttps://doi.org/10.1109/hpca.2018.00040openalex-snapshot
Warp Scheduling for Fine-Grained Synchronization
inferred← citeshttps://doi.org/10.1109/hpca53966.2022.00051openalex-snapshot
LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications
inferred← citeshttps://doi.org/10.1109/iccd.2011.6081373openalex-snapshot
DPPC: Dynamic power partitioning and capping in chip multiprocessors
inferred← citeshttps://doi.org/10.1109/ipdps.2011.49openalex-snapshot
Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00087openalex-snapshot
Independent Forward Progress of Work-groups
inferred← citeshttps://doi.org/10.1109/ispass.2012.6189221openalex-snapshot
Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications
inferred← citeshttps://doi.org/10.1109/ispass.2013.6557141openalex-snapshot
Sampled simulation of multi-threaded applications
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00074openalex-snapshot
HyperPlane: A Scalable Low-Latency Notification Accelerator for Software Data Planes
inferred← citeshttps://doi.org/10.1109/tc.2013.67openalex-snapshot
DPPC: Dynamic Power Partitioning and Control for Improved Chip Multiprocessor Performance
inferred← citeshttps://doi.org/10.1109/tc.2016.2608951openalex-snapshot
Thread Progress Equalization: Dynamically Adaptive Power-Constrained Performance Optimization of Multi-Threaded Applications
inferred← citeshttps://doi.org/10.1109/tc.2018.2836418openalex-snapshot
Contention-Aware Fair Scheduling for Asymmetric Single-ISA Multicore Systems
inferred← citeshttps://doi.org/10.1109/tc.2022.3174480openalex-snapshot
Adapt Burstable Containers to Variable CPU Resources
inferred← citeshttps://doi.org/10.1109/tpds.2011.143openalex-snapshot
Supporting Overcommitted Virtual Machines through Hardware Spin Detection
inferred← citeshttps://doi.org/10.1109/tpds.2013.209openalex-snapshot
Library-Independent Data Race Detection
inferred← citeshttps://doi.org/10.1109/tpds.2017.2720744openalex-snapshot
Efficient Self-Invalidation/Self-Downgrade for Critical Sections with Relaxed Semantics
inferred← citeshttps://doi.org/10.1145/1254882.1254902openalex-snapshot
Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures
inferred← citeshttps://doi.org/10.1145/1269899.1254902openalex-snapshot
Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures
inferred← citeshttps://doi.org/10.1145/1346281.1346314openalex-snapshot
Adapting to intermittent faults in multicore systems
inferred← citeshttps://doi.org/10.1145/1353534.1346314openalex-snapshot
Adapting to intermittent faults in multicore systems
inferred← citeshttps://doi.org/10.1145/1353535.1346314openalex-snapshot
Adapting to intermittent faults in multicore systems
inferred← citeshttps://doi.org/10.1145/1353536.1346314openalex-snapshot
Adapting to intermittent faults in multicore systems
inferred← citeshttps://doi.org/10.1145/1787275.1787281openalex-snapshot
Operating system support for mitigating software scalability bottlenecks on asymmetric multicore processors
inferred← citeshttps://doi.org/10.1145/3431379.3460641openalex-snapshot
Towards Exploiting CPU Elasticity via Efficient Thread Oversubscription
inferred← citeshttps://doi.org/10.1145/3547301openalex-snapshot
Adaptive Contention Management for Fine-Grained Synchronization on Commodity GPUs
inferred← citeshttps://doi.org/10.1145/3799430openalex-snapshot
Accelerating the Simulation of Parallel Workloads using Loop-Bounded Checkpoints
inferred← citeshttps://doi.org/10.7282/t3-0edj-bf23openalex-snapshot
Performance profilers and debugging tools for openMP applications
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.