On the public citation graph

Solving Undirected Graph Problems on VLSI

https://doi.org/10.1137/0214040
0 signed · 20 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1049/ip-i-1.1981.0010openalex-snapshot
Introduction to V.L.S.I. Systems
inferredcites →https://doi.org/10.1109/tc.1983.1676221openalex-snapshot
A Combinatorial Limit to the Computing Power of VLSI Circuits
inferredcites →https://doi.org/10.1109/tc.1983.1676279openalex-snapshot
Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees
inferredcites →https://doi.org/10.1137/0212023openalex-snapshot
VLSI Algorithms for the Connected Component Problem
inferredcites →https://doi.org/10.1145/2422.322421openalex-snapshot
Information Transfer in Distributed Computing with Applications to VLSI
inferredcites →https://doi.org/10.1145/322261.322269openalex-snapshot
The Area-Time Complexity of Binary Multiplication
inferredcites →https://doi.org/10.1145/358645.358660openalex-snapshot
The cube-connected cycles: a versatile network for parallel computation
inferredcites →https://doi.org/10.1145/358808.358814openalex-snapshot
Information transfer and area-time tradeoffs for VLSI multiplication
inferredcites →https://doi.org/10.1145/360933.360975openalex-snapshot
Guarded commands, nondeterminacy and formal derivation of programs
inferredcites →https://doi.org/10.1145/800135.804401openalex-snapshot
Area-time complexity for VLSI

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/3-540-59071-4_43openalex-snapshot
Minimum vertex cover, distributed decision-making, and communication complexity
inferred← citeshttps://doi.org/10.1007/bf01097528openalex-snapshot
Representations of graphs and networks (coding, layouts and embeddings)
inferred← citeshttps://doi.org/10.1007/bf01840437openalex-snapshot
Area-time lower-bound techniques with applications to sorting
inferred← citeshttps://doi.org/10.1016/0022-0000(93)90035-uopenalex-snapshot
Communication complexity and combinatorial lattice theory
inferred← citeshttps://doi.org/10.1016/s0734-189x(86)80059-7openalex-snapshot
Picture processing: 1985
inferred← citeshttps://doi.org/10.1016/s0898-1221(97)90055-9openalex-snapshot
Parallel algorithms for regular architectures: Meshes and pyramids
inferred← citeshttps://doi.org/10.1109/12.277290openalex-snapshot
Parallel computations on reconfigurable meshes
inferred← citeshttps://doi.org/10.1109/sfcs.1988.21924openalex-snapshot
Lattices, mobius functions and communications complexity
inferred← citeshttps://doi.org/10.1137/0216004openalex-snapshot
Data Movement Techniques for the Pyramid Computer
inferred← citeshttps://doi.org/10.1145/62212.62228openalex-snapshot
On the communication complexity of graph properties
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.