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Software prefetching

https://doi.org/10.1145/106975.106979
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1016/0096-0551(81)90048-5openalex-snapshot
Register allocation via coloring
inferredcites →https://doi.org/10.1109/isca.1989openalex-snapshot
The 16th Annual International Symposium on Computer Architecture
inferredcites →https://doi.org/10.1109/mc.1987.1663695openalex-snapshot
A Survey of RISC Processors and Computers of the Mid-1980s
inferredcites →https://doi.org/10.1145/100215.100233openalex-snapshot
Analyzing and visualizing performance of memory hierarchies
inferredcites →https://doi.org/10.1145/325164.325162openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
inferredcites →https://doi.org/10.1145/44571.44576openalex-snapshot
Performance of various computers using standard linear equations software in a FORTRAN environment
inferredcites →https://doi.org/10.1145/800230.806984openalex-snapshot
Register allocation & spilling via graph coloring
inferredcites →https://doi.org/10.1145/93542.93553openalex-snapshot
Improving register allocation for subscripted variables

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-67667-4_26openalex-snapshot
Learning I/O Access Patterns to Improve Prefetching in SSDs
inferred← citeshttps://doi.org/10.1007/s42979-024-02989-wopenalex-snapshot
Accelerating Graph Analytics Using Attention-Based Data Prefetcher
inferred← citeshttps://doi.org/10.1109/ipdps57955.2024.00071openalex-snapshot
Adaptive Prefetching for Fine-grain Communication in PGAS Programs
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00146openalex-snapshot
ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses
inferred← citeshttps://doi.org/10.1109/micro61859.2024.00030openalex-snapshot
SUV: Static Analysis Guided Unified Virtual Memory
inferred← citeshttps://doi.org/10.1109/nmitcon65824.2025.11187944openalex-snapshot
System-Aware Hybrid Prefetcher : A Reinforcement Learning Based Approach
inferred← citeshttps://doi.org/10.1109/tmc.2026.3667012openalex-snapshot
vSoC: Efficient and Debug-Friendly Virtual System-on-Chip for Mobile Emulation
inferred← citeshttps://doi.org/10.1145/1288783.1288789openalex-snapshot
Optimal multistream sequential prefetching in a shared cache
inferred← citeshttps://doi.org/10.1145/2063384.2063435openalex-snapshot
Virtual I/O caching
inferred← citeshttps://doi.org/10.1145/329466.329484openalex-snapshot
Quantifying loop nest locality using SPEC'95 and the perfect benchmarks
inferred← citeshttps://doi.org/10.1145/3307650.3322229openalex-snapshot
Stream-based memory access specialization for general purpose processors
inferred← citeshttps://doi.org/10.1145/3374216openalex-snapshot
Informed Prefetching for Indirect Memory Accesses
inferred← citeshttps://doi.org/10.1145/338407.338561openalex-snapshot
Reducing the impact of software prefetching on register pressure
inferred← citeshttps://doi.org/10.1145/3422575.3422804openalex-snapshot
PreFAM: Understanding the Impact of Prefetching in Fabric-Attached Memory Architectures
inferred← citeshttps://doi.org/10.1145/3579371.3589112openalex-snapshot
Optimizing CPU Performance for Recommendation Systems At-Scale
inferred← citeshttps://doi.org/10.1145/358923.358939openalex-snapshot
Data prefetch mechanisms
inferred← citeshttps://doi.org/10.1145/3694715.3695946openalex-snapshot
vSoC: Efficient Virtual System-on-Chip on Heterogeneous Hardware
inferred← citeshttps://doi.org/10.1145/3695053.3731070openalex-snapshot
Profile-Guided Temporal Prefetching
inferred← citeshttps://doi.org/10.1145/3725843.3756049openalex-snapshot
Software Prefetch Multicast: Sharer-Exposed Prefetching for Bandwidth Efficiency in Manycore Processors
inferred← citeshttps://doi.org/10.1201/9781420043839.ch5openalex-snapshot
Optimizations for Memory Hierarchies
inferred← citeshttps://doi.org/10.14778/3704965.3704986openalex-snapshot
GastCoCo: Graph Storage and Coroutine-Based Prefetch Co-Design for Dynamic Graph Processing
inferred← citeshttps://doi.org/10.3389/fhpcp.2026.1801169openalex-snapshot
An integrated framework for memory-centric analysis: from trace collection to co-design
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