On the public citation graph
Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
0 signed · 19 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1016/j.amc.2010.08.055openalex-snapshot
Fault tolerant routing algorithm based on the artificial potential field model in Network-on-Chip
inferred← citeshttps://doi.org/10.1016/j.compeleceng.2020.106559openalex-snapshot
Insertion loss-aware application mapping onto the optical Cube-Connected Cycles architecture
inferred← citeshttps://doi.org/10.1016/j.ijleo.2015.06.065openalex-snapshot
A data-driven superblock-based flash translation layer
inferred← citeshttps://doi.org/10.1016/j.jmgm.2012.06.015openalex-snapshot
Implementation of the force decomposition machine for molecular dynamics simulations
inferred← citeshttps://doi.org/10.1016/j.jpdc.2017.02.008openalex-snapshot
A novel hardware support for heterogeneous multi-core memory system
inferred← citeshttps://doi.org/10.1016/j.jss.2015.11.019openalex-snapshot
Scalable and efficient configuration of time-division multiplexed resources
inferred← citeshttps://doi.org/10.1016/j.mejo.2019.03.006openalex-snapshot
A meta heuristic-based task scheduling and mapping method to optimize main design challenges of heterogeneous multiprocessor embedded systems
inferred← citeshttps://doi.org/10.1016/j.micpro.2016.11.012openalex-snapshot
Reliability and performance enhancements for SSD RAID
inferred← citeshttps://doi.org/10.1016/j.micpro.2017.03.002openalex-snapshot
Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs
inferred← citeshttps://doi.org/10.1016/j.micpro.2017.10.008openalex-snapshot
Age Aware Pre-emptive Garbage Collection for SSD RAID
inferred← citeshttps://doi.org/10.1016/j.pmcj.2015.10.011openalex-snapshot
Constella: Crowdsourced system setting recommendations for mobile devices
inferred← citeshttps://doi.org/10.1016/j.scico.2016.01.007openalex-snapshot
Parallelism analysis: Precise WCET values for complex multi-core systems
inferred← citeshttps://doi.org/10.1016/j.vlsi.2018.02.003openalex-snapshot
NV-TCAM: Alternative designs with NVM devices
inferred← citeshttps://doi.org/10.1145/3473333openalex-snapshot
Scenario-Aware Program Specialization for Timing Predictability
inferred← citeshttps://doi.org/10.1145/3593025openalex-snapshot
RapidStream 2.0: Automated Parallel Implementation of Latency–Insensitive FPGA Designs Through Partial Reconfiguration
inferred← citeshttps://doi.org/10.1145/3623397openalex-snapshot
Blinder: End-to-end Privacy Protection in Sensing Systems via Personalized Federated Learning
inferred← citeshttps://doi.org/10.1145/3761812openalex-snapshot
FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems
inferred← citeshttps://doi.org/10.1145/3762154openalex-snapshot
Large or Small: Harnessing the Erase Duality of Emerging Bit-Alterable NAND Flash to Suppress Tail Latency
inferred← citeshttps://doi.org/10.3182/20120403-3-de-3010.00020openalex-snapshot
Design and Implementation of a Master-Slave Communication Protocol for Embedded Systems Using SystemC
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.