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Shared reconfigurable fabric for multi-core customization

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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/40.848473openalex-snapshot
Xtensa: a configurable and extensible processor
inferredcites →https://doi.org/10.1109/fpt.2008.4762387openalex-snapshot
Kernel sharing on reconfigurable multiprocessor systems
inferredcites →https://doi.org/10.1109/micro.2004.12openalex-snapshot
Conjoined-Core Chip Multiprocessing
inferredcites →https://doi.org/10.1109/micro.2010.15openalex-snapshot
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
inferredcites →https://doi.org/10.1109/mm.2006.85openalex-snapshot
A Software-Configurable Processor Architecture
inferredcites →https://doi.org/10.1109/tcad.2005.858269openalex-snapshot
Application-specific heterogeneous multiprocessor synthesis using extensible processors
inferredcites →https://doi.org/10.1145/1278480.1278682openalex-snapshot
Design methodology for pipelined heterogeneous multiprocessor system
inferredcites →https://doi.org/10.1145/1723112.1723119openalex-snapshot
Combining multicore and reconfigurable instruction set extensions
inferredcites →https://doi.org/10.1287/opre.38.6.993openalex-snapshot
A Multistage Linear Array Assignment Problem
inferredcites →https://doi.org/10.5555/1874620.1874986openalex-snapshot
Runtime reconfiguration of custom instructions for real-time embedded systems

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-16949-7_1openalex-snapshot
i-Core: A Runtime-Reconfigurable Processor Platform for Cyber-Physical Systems
inferred← citeshttps://doi.org/10.1007/978-3-319-69374-3_1openalex-snapshot
Introduction
inferred← citeshttps://doi.org/10.1007/s13369-020-04634-zopenalex-snapshot
An Efficient Implementation of Divergence State Estimation with Biogeography-Based Optimization (DSEBBO) Framework in FPGA-Based Multiprocessor System
inferred← citeshttps://doi.org/10.1016/j.micpro.2015.05.006openalex-snapshot
Hardware resource utilization optimization in FPGA-based Heterogeneous MPSoC architectures
inferred← citeshttps://doi.org/10.1016/j.sysarc.2019.07.010openalex-snapshot
Predicting performance in multi-core systems with shared reconfigurable accelerators
inferred← citeshttps://doi.org/10.1109/biocas.2016.7833820openalex-snapshot
A multi-core reconfigurable architecture for ultra-low power bio-signal analysis
inferred← citeshttps://doi.org/10.1109/cads.2013.6714244openalex-snapshot
A platform for multi reconfigurable instruction set processor system on chip (MRPSoC)
inferred← citeshttps://doi.org/10.1109/cases.2013.6662505openalex-snapshot
Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems
inferred← citeshttps://doi.org/10.1109/date.2012.6176537openalex-snapshot
Online scheduling for multi-core shared reconfigurable fabric
inferred← citeshttps://doi.org/10.1109/dsd.2014.83openalex-snapshot
Design Space Exploration for Customized Asymmetric Heterogeneous MPSoC
inferred← citeshttps://doi.org/10.1109/fpt.2014.7082811openalex-snapshot
Online scheduling for FPGA computation in the Cloud
inferred← citeshttps://doi.org/10.1109/idt.2015.7396742openalex-snapshot
A bi-objective heuristic for heterogeneous MPSoC design space exploration
inferred← citeshttps://doi.org/10.1109/isca.2018.00054openalex-snapshot
Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables
inferred← citeshttps://doi.org/10.1109/recosoc.2013.6581549openalex-snapshot
Shared hardware accelerator architectures for heterogeneous MPSoCs
inferred← citeshttps://doi.org/10.1109/sbcci50935.2020.9189927openalex-snapshot
A Management Technique for Concurrent Access to a Reconfigurable Accelerator
inferred← citeshttps://doi.org/10.1109/tcsi.2017.2701499openalex-snapshot
HEAL-WEAR: An Ultra-Low Power Heterogeneous System for Bio-Signal Analysis
inferred← citeshttps://doi.org/10.1145/2483028.2483101openalex-snapshot
DRMA
inferred← citeshttps://doi.org/10.1145/2656106.2656119openalex-snapshot
COREFAB
inferred← citeshttps://doi.org/10.5555/2492708.2492853openalex-snapshot
Online scheduling for multi-core shared reconfigurable fabric
inferred← citeshttps://doi.org/10.5753/sbesc_estendido.2019.8645openalex-snapshot
A Partially Shared Thin Reconfigurable Array For Multicore Processor
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