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A Tradeoff Analysis of FPGAs, GPUs, and Multicores for Sliding-Window Applications
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-1-4419-1570-2openalex-snapshot
Information Theoretic Learning: Renyi's Entropy and Kernel Perspectives
inferredcites →https://doi.org/10.1007/978-3-540-71431-6_11openalex-snapshot
Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware
inferredcites →https://doi.org/10.1007/s00138-007-0105-zopenalex-snapshot
Feature tracking and matching in video using programmable graphics hardware
inferredcites →https://doi.org/10.1109/fccm.2004.21openalex-snapshot
Closing the Gap: CPU and FPGA Trends in Sustainable Floating-Point BLAS Performance
inferredcites →https://doi.org/10.1109/fccm.2006.29openalex-snapshot
Automatic Sliding Window Operation Optimization for FPGA-Based
inferredcites →https://doi.org/10.1109/fccm.2007.43openalex-snapshot
A Configurable Processor Synthesis System
inferredcites →https://doi.org/10.1109/fccm.2008.24openalex-snapshot
Real-Time Optical Flow Calculations on FPGA and GPU Architectures: A Comparison Study
inferredcites →https://doi.org/10.1109/fpl.2009.5272532openalex-snapshot
Performance comparison of FPGA, GPU and CPU in image processing
inferredcites →https://doi.org/10.1109/fpt.2005.1568533openalex-snapshot
Have GPUs made FPGAs redundant in the field of video processing?
inferredcites →https://doi.org/10.1109/iscas.2003.1206117openalex-snapshot
Performance and complexity joint optimization for H.264 video coding
inferredcites →https://doi.org/10.1109/isvlsi.2010.84openalex-snapshot
BLAS Comparison on FPGA, CPU and GPU
inferredcites →https://doi.org/10.1109/jproc.2004.840301openalex-snapshot
The Design and Implementation of FFTW3
inferredcites →https://doi.org/10.1109/mcse.2010.69openalex-snapshot
OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems
inferredcites →https://doi.org/10.1109/sasp.2008.4570793openalex-snapshot
Accelerating Compute-Intensive Applications with GPUs and FPGAs
inferredcites →https://doi.org/10.1109/tc.2011.120openalex-snapshot
A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features
inferredcites →https://doi.org/10.1109/tencon.1997.648244openalex-snapshot
A generic implementation framework for FPGA based stereo matching
inferredcites →https://doi.org/10.1109/tsp.2007.896065openalex-snapshot
Correntropy: Properties and Applications in Non-Gaussian Signal Processing
inferredcites →https://doi.org/10.1109/ultsym.1995.495835openalex-snapshot
Relative performance of two-dimensional speckle-tracking techniques: normalized correlation, non-normalized correlation and sum-absolute-difference
inferredcites →https://doi.org/10.1145/1365490.1365500openalex-snapshot
Scalable Parallel Programming with CUDA
inferredcites →https://doi.org/10.1145/2145694.2145704openalex-snapshot
A performance and energy comparison of FPGAs, GPUs, and multicores for sliding-window applications
inferredcites →https://doi.org/10.1145/968280.968304openalex-snapshot
A quantitative analysis of the speedup factors of FPGAs over processors
inferredcites →https://doi.org/10.1145/997163.997199openalex-snapshot
Input data reuse in compiling window operations onto reconfigurable hardware
inferredcites →https://doi.org/10.4018/978-1-59904-849-9.ch133openalex-snapshot
Information Theoretic Learning
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Boosting the Hardware-Efficiency of Cascade Support Vector Machines for Embedded Classification Applications
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FIPLib: An Image Processing Library for FPGAs Using High-Level Synthesis
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A Novel Hardware/Software Partitioning Method Based on Position Disturbed Particle Swarm Optimization with Invasive Weed Optimization
inferred← citeshttps://doi.org/10.1007/s11554-017-0690-7openalex-snapshot
An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing
inferred← citeshttps://doi.org/10.1016/j.future.2020.03.061openalex-snapshot
Architecturally truly diverse systems: A review
inferred← citeshttps://doi.org/10.1016/j.sysarc.2020.101896openalex-snapshot
Benchmarking vision kernels and neural network inference accelerators on embedded platforms
inferred← citeshttps://doi.org/10.1051/itmconf/20224604002openalex-snapshot
Design and Simulation of a Median Filter for a CubeSat Image Processing Application Using an FPGA Architecture
inferred← citeshttps://doi.org/10.1109/asap.2015.7245738openalex-snapshot
Large-scale packet classification on FPGA
inferred← citeshttps://doi.org/10.1109/cluster48925.2021.00065openalex-snapshot
cuZ-Checker: A GPU-Based Ultra-Fast Assessment System for Lossy Compressions
inferred← citeshttps://doi.org/10.1109/fpl.2015.7294011openalex-snapshot
Automatic support for multi-module parallelism from computational patterns
inferred← citeshttps://doi.org/10.1109/icccn.2019.8847115openalex-snapshot
OpenStack Generalization for Hardware Accelerated Clouds
inferred← citeshttps://doi.org/10.1109/icess.2019.8782524openalex-snapshot
Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels
inferred← citeshttps://doi.org/10.1109/ict4m.2018.00038openalex-snapshot
Window Size and Round-Trip-Time in a Network Transmission Session
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A Uniquified Virtualization Approach to Hardware Security
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Overlay-based side-channel countermeasures: A case study on correlated noise generation
inferred← citeshttps://doi.org/10.1109/tip.2017.2678799openalex-snapshot
Fast 2D Convolutions and Cross-Correlations Using Scalable Architectures
inferred← citeshttps://doi.org/10.1117/1.jei.25.4.041013openalex-snapshot
Accelerating object detection via a visual-feature-directed search cascade: algorithm and field programmable gate array implementation
inferred← citeshttps://doi.org/10.1145/3174243.3174262openalex-snapshot
Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems
inferred← citeshttps://doi.org/10.1145/3431920.3439301openalex-snapshot
HBM Connect: High-Performance HLS Interconnect for FPGA HBM
inferred← citeshttps://doi.org/10.1155/2019/4298013openalex-snapshot
ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures
inferred← citeshttps://doi.org/10.23919/mipro48935.2020.9245341openalex-snapshot
A Survey on Parallel Architectures and Programming Models
inferred← citeshttps://doi.org/10.31274/etd-20210114-116openalex-snapshot
Efficient processing of vision kernels and deep neural networks on reconfigurable computing architectures
inferred← citeshttps://doi.org/10.33166/aetic.2021.02.005openalex-snapshot
FPGA Implementations of Algorithms for Preprocessing of High Frame Rate and High Resolution Image Streams in Real Time
inferred← citeshttps://doi.org/10.3390/electronics15122498openalex-snapshot
On the Edge-Computing-Oriented Inference of Radial Basis Function-Based Kolmogorov–Arnold Networks
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Parallel reconfigurable hardware architectures for video processing applications
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