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A Survey on Chip to System Reverse Engineering
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/11545262_25openalex-snapshot
Data Remanence in Flash Memory Devices
inferredcites →https://doi.org/10.1007/3-540-44499-8_24openalex-snapshot
Physical Security Devices for Computer Subsystems: A Survey of Attacks and Defenses
inferredcites →https://doi.org/10.1007/3-540-44709-1openalex-snapshot
Cryptographic Hardware and Embedded Systems — CHES 2001
inferredcites →https://doi.org/10.1007/978-0-387-71817-0_11openalex-snapshot
Secure and Efficient Implementation of Symmetric Encryption Schemes using FPGAs
inferredcites →https://doi.org/10.1007/978-3-540-28632-5_2openalex-snapshot
Correlation Power Analysis with a Leakage Model
inferredcites →https://doi.org/10.1007/978-3-540-45238-6openalex-snapshot
Cryptographic Hardware and Embedded Systems - CHES 2003
inferredcites →https://doi.org/10.1007/978-3-540-74085-8openalex-snapshot
Applied Scanning Probe Methods X
inferredcites →https://doi.org/10.1007/978-3-642-04138-9_26openalex-snapshot
The State-of-the-Art in IC Reverse Engineering
inferredcites →https://doi.org/10.1007/978-3-642-27954-6_1openalex-snapshot
Black-Box Side-Channel Attacks Highlight the Importance of Countermeasures
inferredcites →https://doi.org/10.1007/s00163-011-0109-6openalex-snapshot
The fundamentals of barriers to reverse engineering and their implementation into mechanical components
inferredcites →https://doi.org/10.1007/s10836-013-5428-2openalex-snapshot
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment
inferredcites →https://doi.org/10.1007/s10836-013-5430-8openalex-snapshot
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead
inferredcites →https://doi.org/10.1016/0166-3615(95)00063-1openalex-snapshot
Automated inspection of printed circuit boards through machine vision
inferredcites →https://doi.org/10.1016/0360-8352(94)90071-xopenalex-snapshot
Reverse engineering industrial applications
inferredcites →https://doi.org/10.1016/j.microrel.2005.07.055openalex-snapshot
Oxide charge measurements in EEPROM devices
inferredcites →https://doi.org/10.1016/j.microrel.2006.07.022openalex-snapshot
Descrambling and data reading techniques for flash-EEPROM memories. Application to smart cards
inferredcites →https://doi.org/10.1109/2.30731openalex-snapshot
Design recovery for maintenance and reuse
inferredcites →https://doi.org/10.1109/54.199803openalex-snapshot
An automatic netlist-to-schematic generator
inferredcites →https://doi.org/10.1109/54.785838openalex-snapshot
Unveiling the ISCAS-85 benchmarks: a case study in reverse engineering
inferredcites →https://doi.org/10.1109/autest.1995.522701openalex-snapshot
Nondestructive reverse engineering of trace maps in multilayered PCBs
inferredcites →https://doi.org/10.1109/dft.2014.6962096openalex-snapshot
CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly
inferredcites →https://doi.org/10.1109/ectc.1996.550495openalex-snapshot
Plastic chip carrier package
inferredcites →https://doi.org/10.1109/fdtc.2013.13openalex-snapshot
Security Risks Posed by Modern IC Debug and Diagnosis Tools
inferredcites →https://doi.org/10.1109/fpl.2006.311255openalex-snapshot
Identifying FPGA IP-Cores Based on Lookup Table Content Analysis
inferredcites →https://doi.org/10.1109/fpl.2012.6339165openalex-snapshot
Bil: A tool-chain for bitstream reverse-engineering
inferredcites →https://doi.org/10.1109/host54066.2022.9839913openalex-snapshot
Proceedings of the 2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
inferredcites →https://doi.org/10.1109/hst.2009.5224964openalex-snapshot
Analysis and design of active IC metering schemes
inferredcites →https://doi.org/10.1109/hst.2012.6224325openalex-snapshot
Reverse engineering circuits using behavioral pattern mining
inferredcites →https://doi.org/10.1109/hst.2013.6581568openalex-snapshot
WordRev: Finding word-level structures in a sea of bit-level gates
inferredcites →https://doi.org/10.1109/icpads.2008.126openalex-snapshot
Secure Embedded Systems: The Threat of Reverse Engineering
inferredcites →https://doi.org/10.1109/isqed.2014.6783305openalex-snapshot
On application of one-class SVM to reverse engineering-based hardware Trojan detection
inferredcites →https://doi.org/10.1109/jproc.2014.2332291openalex-snapshot
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain
inferredcites →https://doi.org/10.1109/jssc.2006.880603openalex-snapshot
A 32-KB Standard CMOS Antifuse One-Time Programmable ROM Embedded in a 16-bit Microcontroller
inferredcites →https://doi.org/10.1109/mdat.2014.2347918openalex-snapshot
How Secure Are Printed Circuit Boards Against Trojan Attacks?
inferredcites →https://doi.org/10.1109/mdt.2010.24openalex-snapshot
Preventing IC Piracy Using Reconfigurable Logic Barriers
inferredcites →https://doi.org/10.1109/tcad.2009.2028166openalex-snapshot
HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection
inferredcites →https://doi.org/10.1145/1344671.1344729openalex-snapshot
From the bitstream to the netlist
inferredcites →https://doi.org/10.1145/1391469.1391684openalex-snapshot
Protecting bus-based hardware IP by secret sharing
inferredcites →https://doi.org/10.1145/1687399.1687524openalex-snapshot
A study of Through-Silicon-Via impact on the 3D stacked IC layout
inferredcites →https://doi.org/10.1145/1785481.1785587openalex-snapshot
Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystems
inferredcites →https://doi.org/10.1145/1973009.1973110openalex-snapshot
Integrated circuits metering for piracy protection and digital rights management
inferredcites →https://doi.org/10.1145/2046707.2046722openalex-snapshot
On the vulnerability of FPGA bitstream encryption against power analysis attacks
inferredcites →https://doi.org/10.1145/2228360.2228377openalex-snapshot
Security analysis of logic obfuscation
inferredcites →https://doi.org/10.1145/2459976.2459985openalex-snapshot
Interlocking obfuscation for anti-tamper hardware
inferredcites →https://doi.org/10.1145/2508859.2516656openalex-snapshot
Security analysis of integrated circuit camouflaging
inferredcites →https://doi.org/10.1145/2629462openalex-snapshot
Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs
inferredcites →https://doi.org/10.1145/586110.586132openalex-snapshot
Silicon physical random functions
inferredcites →https://doi.org/10.1145/775832.775845openalex-snapshot
Energy-aware design techniques for differential power analysis protection
inferredcites →https://doi.org/10.1364/josaa.15.002312openalex-snapshot
Unified reconstruction theory for diffraction tomography, with consideration of noise control
inferredcites →https://doi.org/10.31399/asm.cp.istfa2006p0086openalex-snapshot
Direct Measurements of Charge in Floating Gate Transistor Channels of Flash Memories Using Scanning Capacitance Microscopy
inferredcites →https://doi.org/10.48456/tr-630openalex-snapshot
Semi-invasive attacks – A new approach to hardware security analysis
inferredcites →https://doi.org/10.5555/2485288.2485594openalex-snapshot
Reverse engineering digital circuits using functional analysis
inferredcites →https://doi.org/10.6084/m9.figshare.991440openalex-snapshot
Morphological Operation on Printed Circuit Board (PCB) Reverse Engineering using MATLAB
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/smll.75550openalex-snapshot
Unified In‐Memory Hardware Security Enabled by an Entropy Landscape in a Memristor Crossbar
inferred← citeshttps://doi.org/10.1002/sstr.202200060openalex-snapshot
Application of 2D Materials in Hardware Security for Internet‐of‐Things: Progress and Perspective
inferred← citeshttps://doi.org/10.1007/978-3-030-41247-0_3openalex-snapshot
IC Camouflaging Optimization and Evaluation
inferred← citeshttps://doi.org/10.1007/978-3-030-62609-9_1openalex-snapshot
Physical Inspection and Attacks: An Overview
inferred← citeshttps://doi.org/10.1007/978-3-030-62609-9_4openalex-snapshot
Physical Inspection of Printed Circuit Boards
inferred← citeshttps://doi.org/10.1007/978-3-030-62609-9_5openalex-snapshot
Electrical Probing Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-73445-9_1openalex-snapshot
Split Manufacturing Methods
inferred← citeshttps://doi.org/10.1007/978-3-030-78841-4_1openalex-snapshot
Introduction and Background
inferred← citeshttps://doi.org/10.1007/978-3-030-85792-9_2openalex-snapshot
Reconfigurability for Static Camouflaging
inferred← citeshttps://doi.org/10.1007/978-3-030-85792-9_7openalex-snapshot
Tamper-Proof Hardware from Emerging Technologies
inferred← citeshttps://doi.org/10.1007/978-3-031-04435-9_19openalex-snapshot
A Study about Automated Optical Inspection: Inspection Algorithms Applied in Flexible Manufacturing Printed Circuit Board Cells Using the Mahalanobis Distance Method 1
inferred← citeshttps://doi.org/10.1007/978-3-031-19185-5_10openalex-snapshot
Hardware Camouflaging in Integrated Circuits
inferred← citeshttps://doi.org/10.1007/978-3-031-26896-0_13openalex-snapshot
CAD for Anti-counterfeiting
inferred← citeshttps://doi.org/10.1007/978-3-031-26896-0_15openalex-snapshot
CAD for Reverse Engineering
inferred← citeshttps://doi.org/10.1007/978-3-031-68385-5_11openalex-snapshot
HAWKEYE – Recovering Symmetric Cryptography From Hardware Circuits
inferred← citeshttps://doi.org/10.1007/978-3-032-08514-6_7openalex-snapshot
AI Production Process Security Attacks and Mitigation Techniques
inferred← citeshttps://doi.org/10.1007/978-3-032-09575-6_5openalex-snapshot
Scalable Design Techniques for Expanding Ferroelectric-Based Non-volatile SRAMs Applications
inferred← citeshttps://doi.org/10.1007/978-3-319-49019-9_1openalex-snapshot
Introduction to Hardware Obfuscation: Motivation, Methods and Evaluation
inferred← citeshttps://doi.org/10.1007/978-3-319-49019-9_4openalex-snapshot
Gate Camouflaging-Based Obfuscation
inferred← citeshttps://doi.org/10.1007/978-3-319-49019-9_5openalex-snapshot
Permutation-Based Obfuscation
inferred← citeshttps://doi.org/10.1007/978-3-319-49025-0_5openalex-snapshot
Analyzing Circuit Layout to Probing Attack
inferred← citeshttps://doi.org/10.1007/978-3-319-50380-6_6openalex-snapshot
Hardware Obfuscation: Techniques and Open Challenges
inferred← citeshttps://doi.org/10.1007/978-3-319-68511-3_5openalex-snapshot
Hardware Trojans in Analog, Mixed-Signal, and RF ICs
inferred← citeshttps://doi.org/10.1007/978-981-13-7071-7_36openalex-snapshot
An Analysis of Data Security and Potential Threat from IT Assets for Middle Card Players, Institutions and Individuals
inferred← citeshttps://doi.org/10.1007/978-981-92-3513-1_44openalex-snapshot
YOLO-RE: An Efficient and Accurate Detector for Integrated Circuit Reverse Engineering Based on YOLOv13-N
inferred← citeshttps://doi.org/10.1007/978-981-95-2457-0_2openalex-snapshot
High-Level Synthesis in VLSI Design
inferred← citeshttps://doi.org/10.1007/978-981-97-8429-5_1openalex-snapshot
Plundervolt Attack: Simulation-Based Voltage Glitching Attack Against the Robotics Industry
inferred← citeshttps://doi.org/10.1007/s10836-018-5726-9openalex-snapshot
Machine Learning for Hardware Security: Opportunities and Risks
inferred← citeshttps://doi.org/10.1007/s11390-018-1807-6openalex-snapshot
Spear and Shield: Evolution of Integrated Circuit Camouflaging
inferred← citeshttps://doi.org/10.1007/s13389-021-00268-5openalex-snapshot
A survey of algorithmic methods in IC reverse engineering
inferred← citeshttps://doi.org/10.1007/s13389-022-00295-wopenalex-snapshot
A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention
inferred← citeshttps://doi.org/10.1007/s41207-018-0050-4openalex-snapshot
E-waste environmental and information security threat: GCC countries vulnerabilities
inferred← citeshttps://doi.org/10.1007/s41635-017-0024-zopenalex-snapshot
Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security
inferred← citeshttps://doi.org/10.1007/s41635-018-0044-3openalex-snapshot
Survey on Applications of Formal Methods in Reverse Engineering and Intellectual Property Protection
inferred← citeshttps://doi.org/10.1007/s41635-018-0051-4openalex-snapshot
Large-Area Automated Layout Extraction Methodology for Full-IC Reverse Engineering
inferred← citeshttps://doi.org/10.1007/s41635-018-0055-0openalex-snapshot
Detecting Hardware Trojans Inserted by Untrusted Foundry Using Physical Inspection and Advanced Image Processing
inferred← citeshttps://doi.org/10.1007/s41635-025-00169-7openalex-snapshot
Optimized RC-PUF Design for IoT Security: Evaluation of the Impact of ADC Bit Selection and Time Delay on Uniqueness, Reliability, and Statistical Randomness
inferred← citeshttps://doi.org/10.1016/b978-0-12-812477-2.00012-5openalex-snapshot
Hardware IP Piracy and Reverse Engineering
inferred← citeshttps://doi.org/10.1016/b978-0-12-812477-2.00015-0openalex-snapshot
Physical Attacks and Countermeasures
inferred← citeshttps://doi.org/10.1016/b978-0-44-318542-7.00013-0openalex-snapshot
Texture analysis of encapsulant packaging materials
inferred← citeshttps://doi.org/10.1016/b978-0-44-318542-7.00015-4openalex-snapshot
Tracking and tracing methods for hardware assurance
inferred← citeshttps://doi.org/10.1016/b978-0-44-318542-7.00016-6openalex-snapshot
Sample preparation for hardware assurance
inferred← citeshttps://doi.org/10.1016/b978-0-44-318542-7.00019-1openalex-snapshot
Electron beam probing for advanced IC packaging assurance
inferred← citeshttps://doi.org/10.1016/b978-0-44-318754-4.00029-6openalex-snapshot
Secure heterogeneous integration
inferred← citeshttps://doi.org/10.1016/b978-0-443-22158-3.00021-1openalex-snapshot
Security modules for biomedical signal processing using Internet of Things
inferred← citeshttps://doi.org/10.1016/j.cose.2019.06.006openalex-snapshot
Random active shield generation based on modified artificial fish-swarm algorithm
inferred← citeshttps://doi.org/10.1016/j.eswa.2024.125479openalex-snapshot
Simple integrated circuit reverse-engineering with deep learning: A proof of concept for automating die-polygon-capturing
inferred← citeshttps://doi.org/10.1016/j.jisa.2021.102861openalex-snapshot
Attacks on cryptosystems implemented via VLSI: A review
inferred← citeshttps://doi.org/10.1016/j.mee.2023.112107openalex-snapshot
Novel methods for locating and matching IC cells based on standard cell libraries
inferred← citeshttps://doi.org/10.1016/j.mejo.2021.105024openalex-snapshot
A novel silicon interposer based high security integration approach for microsystem
inferred← citeshttps://doi.org/10.1016/j.vlsi.2018.10.009openalex-snapshot
Parallelizing SAT-based de-camouflaging attacks by circuit partitioning and conflict avoiding
inferred← citeshttps://doi.org/10.1016/j.vlsi.2021.03.002openalex-snapshot
On malicious implants in PCBs throughout the supply chain
inferred← citeshttps://doi.org/10.1016/j.vlsi.2023.102111openalex-snapshot
TA-denseNet: Efficient hardware trust and assurance model based on feature extraction and comparison of SEM images and GDSII images
inferred← citeshttps://doi.org/10.1016/j.vlsi.2024.102343openalex-snapshot
DAGNN-RE: Directed acyclic graph neural network for functional reverse engineering of gate-level netlist
inferred← citeshttps://doi.org/10.1021/acsami.2c10212openalex-snapshot
Multilevel Anti-Counterfeiting Based on Covert Structural Features Embedded in Femtosecond-Laser-Treated Gold Nanocluster/Graphene Hybrid Layer
inferred← citeshttps://doi.org/10.1021/acsnano.0c10651openalex-snapshot
Satisfiability Attack-Resistant Camouflaged Two-Dimensional Heterostructure Devices
inferred← citeshttps://doi.org/10.1021/acsnano.1c07292openalex-snapshot
Secure Electronics Enabled by Atomically Thin and Photosensitive Two-Dimensional Memtransistors
inferred← citeshttps://doi.org/10.1021/acsnanoscienceau.2c00017openalex-snapshot
Graphene and Beyond: Recent Advances in Two-Dimensional Materials Synthesis, Properties, and Devices
inferred← citeshttps://doi.org/10.1038/s42005-019-0139-3openalex-snapshot
Biological physically unclonable function
inferred← citeshttps://doi.org/10.1049/cdt2.12022openalex-snapshot
Noise‐based logic locking scheme against signal probability skew analysis
inferred← citeshttps://doi.org/10.1063/5.0228085openalex-snapshot
Accessing dependability analysis against fault injection attacks in Robotics industry
inferred← citeshttps://doi.org/10.1088/1361-6528/ac1ebdopenalex-snapshot
High resolution front-side visualization of charge stored in EEPROM with scanning nonlinear dielectric microscopy (SNDM)
inferred← citeshttps://doi.org/10.1088/1674-4926/41/10/102105openalex-snapshot
Design, modelling, and simulation of a floating gate transistor with a novel security feature
inferred← citeshttps://doi.org/10.1088/1742-6596/1927/1/012013openalex-snapshot
An R-SIFT Image Matching Intelligent Algorithm Applied to Hardware Trojan Detection
inferred← citeshttps://doi.org/10.1088/1742-6596/787/1/012023openalex-snapshot
Counterfeit Electronics Detection Using Image Processing and Machine Learning
inferred← citeshttps://doi.org/10.1088/1755-1315/1423/1/012014openalex-snapshot
Data and transaction security as priority in operationalizing blockchain technology in ferry transportation: a literature review
inferred← citeshttps://doi.org/10.1088/2631-8695/ad7c06openalex-snapshot
Trusted microelectronics: reverse engineering chip die using U-Net convolutional network
inferred← citeshttps://doi.org/10.1109/access.2019.2901949openalex-snapshot
A Comprehensive FPGA Reverse Engineering Tool-Chain: From Bitstream to RTL Code
inferred← citeshttps://doi.org/10.1109/access.2021.3059100openalex-snapshot
A Novel Authentication Methodology to Detect Counterfeit PCB Using PCB Trace-Based Ring Oscillator
inferred← citeshttps://doi.org/10.1109/access.2021.3114360openalex-snapshot
REFICS: Assimilating Data-Driven Paradigms Into Reverse Engineering and Hardware Assurance on Integrated Circuits
inferred← citeshttps://doi.org/10.1109/access.2021.3131969openalex-snapshot
Trojan Attack on the Initialization of Pseudo-Random Bit Generators Using Synchronization of Chaotic Input Sources
inferred← citeshttps://doi.org/10.1109/access.2023.3340618openalex-snapshot
SECURE: A Segmentation Quality Evaluation Metric on SEM Images for Reverse Engineering on Integrated Circuits
inferred← citeshttps://doi.org/10.1109/asianhost.2016.7835552openalex-snapshot
Aging attacks for key extraction on permutation-based obfuscation
inferred← citeshttps://doi.org/10.1109/asianhost.2017.8353990openalex-snapshot
MPA: Model-assisted PCB attestation via board-level RO and temperature compensation
inferred← citeshttps://doi.org/10.1109/asianhost.2018.8607159openalex-snapshot
A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks
inferred← citeshttps://doi.org/10.1109/asp-dac66049.2026.11420411openalex-snapshot
X-Matrix Shield: Defeating Tilted FIB and Rerouting Attacks through 3D-Interlaced Protection
inferred← citeshttps://doi.org/10.1109/aspdac.2018.8297315openalex-snapshot
A conflict-free approach for parallelizing SAT-based de-camouflaging attacks
inferred← citeshttps://doi.org/10.1109/bigdatase50710.2020.00021openalex-snapshot
Hardware Trojan Detection Combines with Machine Learning: an Isolation Forest-based Detection Method
inferred← citeshttps://doi.org/10.1109/calcon49167.2020.9106531openalex-snapshot
Studies on Security Threats in Waste Mobile Phone Recycling Supply Chain in India
inferred← citeshttps://doi.org/10.1109/compsac65507.2025.00184openalex-snapshot
Quantifying Completeness of Reconstructed Scenarios: A Case Study on Echo Show
inferred← citeshttps://doi.org/10.1109/controlo.2018.8439790openalex-snapshot
Area-Efficient Delay-based PUF Based on Logic Gates
inferred← citeshttps://doi.org/10.1109/cse-euc.2017.158openalex-snapshot
Anti-Reverse-Engineering Tool of Executable Files on the Windows Platform
inferred← citeshttps://doi.org/10.1109/ddecs60919.2024.10508905openalex-snapshot
Fault-Simulation-Based Flip-Flop Classification for Reverse Engineering
inferred← citeshttps://doi.org/10.1109/dft.2015.7315145openalex-snapshot
Chip-level anti-reverse engineering using transformable interconnects
inferred← citeshttps://doi.org/10.1109/ecctd49232.2020.9218406openalex-snapshot
Secure Scan Design with a Novel Methodology of Scan Camouflaging
inferred← citeshttps://doi.org/10.1109/ectc51529.2024.00079openalex-snapshot
PQC-HI: PQC-enabled Chiplet Authentication and Key Exchange in Heterogeneous Integration
inferred← citeshttps://doi.org/10.1109/ets.2017.7968235openalex-snapshot
Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective
inferred← citeshttps://doi.org/10.1109/fpl68686.2025.00020openalex-snapshot
Identifying Sat Resilient Blocks Through LUT Switching Analysis for Breaking Compound Logic Locking Schemes
inferred← citeshttps://doi.org/10.1109/host45689.2020.9300272openalex-snapshot
ReGDS: A Reverse Engineering Framework from GDSII to Gate-level Netlist
inferred← citeshttps://doi.org/10.1109/host54066.2022.9840293openalex-snapshot
Chosen-Plaintext Attack on Energy-Efficient Hardware Implementation of GIFT-COFB
inferred← citeshttps://doi.org/10.1109/hst.2016.7495575openalex-snapshot
A layout-driven framework to assess vulnerability of ICs to microprobing attacks
inferred← citeshttps://doi.org/10.1109/hst.2019.8741031openalex-snapshot
Golden Gates: A New Hybrid Approach for Rapid Hardware Trojan Detection using Testing and Imaging
inferred← citeshttps://doi.org/10.1109/icaia57370.2023.10169781openalex-snapshot
Novel Obfuscated Secure Architecture for Baugh Wooley Multiplier
inferred← citeshttps://doi.org/10.1109/icasid.2019.8924992openalex-snapshot
Hardware Trojan Detection Combine with Machine Learning: an SVM-based Detection Approach
inferred← citeshttps://doi.org/10.1109/iccad51958.2021.9643498openalex-snapshot
ReIGNN: State Register Identification Using Graph Neural Networks for Circuit Reverse Engineering
inferred← citeshttps://doi.org/10.1109/iccad57390.2023.10323906openalex-snapshot
WolFEx: Word-Level Function Extraction and Simplification from Gate-Level Arithmetic Circuits
inferred← citeshttps://doi.org/10.1109/iccad66269.2025.11241012openalex-snapshot
Designing with Deception: ML- and Covert Gate-Enhanced Camouflaging to Thwart IC Reverse Engineering
inferred← citeshttps://doi.org/10.1109/icce46568.2020.9043104openalex-snapshot
Embedded Systems Authentication and Encryption Using Strong PUF Modeling
inferred← citeshttps://doi.org/10.1109/icces54031.2021.9686147openalex-snapshot
Securing Hardware from Malicious Attacks
inferred← citeshttps://doi.org/10.1109/iccsn.2018.8488275openalex-snapshot
Area-Efficient Delay-based PUF Based on Logic Gates
inferred← citeshttps://doi.org/10.1109/icfeeie66944.2025.00026openalex-snapshot
Dctd: a Chip Trojan Detection Dataset Based on Direct Image Comparison
inferred← citeshttps://doi.org/10.1109/icfpt56656.2022.9974401openalex-snapshot
Leveraging FPGA Primitives to Improve Word Reconstruction during Netlist Reverse Engineering
inferred← citeshttps://doi.org/10.1109/iecon51785.2023.10312021openalex-snapshot
GRACER: Graph-Based Standard Cell Recognition in IC Images for Hardware Assurance
inferred← citeshttps://doi.org/10.1109/iisa.2016.7785372openalex-snapshot
A survey on reverse engineering of technical diagrams
inferred← citeshttps://doi.org/10.1109/iolts69666.2026.11633870openalex-snapshot
Structural Security Entropy: A Novel Prior for Robust GNN-Based Security Assessment of Netlists
inferred← citeshttps://doi.org/10.1109/iscas.2016.7539132openalex-snapshot
Reverse engineering resistant ROM design using transformable via-programming structure
inferred← citeshttps://doi.org/10.1109/iscas.2018.8350950openalex-snapshot
Extract LUT Logics from a Downloaded Bitstream Data in FPGA
inferred← citeshttps://doi.org/10.1109/iscas45731.2020.9180705openalex-snapshot
Efficacy of Satisfiability-Based Attacks in the Presence of Circuit Reverse-Engineering Errors
inferred← citeshttps://doi.org/10.1109/iscas46773.2023.10181578openalex-snapshot
SEM2GDS: A Deep-Learning Based Framework To Detect Malicious Modifications In IC Layout
inferred← citeshttps://doi.org/10.1109/isqed51717.2021.9424257openalex-snapshot
Trusted Electronic Systems with Untrusted COTS
inferred← citeshttps://doi.org/10.1109/isvlsi49217.2020.00029openalex-snapshot
On Leveraging Multi-threshold FinFETs for Design Obfuscation
inferred← citeshttps://doi.org/10.1109/itc44778.2020.9325222openalex-snapshot
SPARTA: A Laser Probing Approach for Trojan Detection
inferred← citeshttps://doi.org/10.1109/ivsw.2017.8031550openalex-snapshot
Hardware reverse engineering: Overview and open challenges
inferred← citeshttps://doi.org/10.1109/ivsw.2018.8494856openalex-snapshot
Physical Inspection & Attacks: New Frontier in Hardware Security
inferred← citeshttps://doi.org/10.1109/jiot.2018.2890277openalex-snapshot
Low-Cost and Secure Firmware Obfuscation Method for Protecting Electronic Systems From Cloning
inferred← citeshttps://doi.org/10.1109/jssc.2025.3534753openalex-snapshot
Digital In-Memory Compute for Machine Learning Applications With Input and Model Security
inferred← citeshttps://doi.org/10.1109/mdat.2017.2729398openalex-snapshot
Probing Attacks on Integrated Circuits: Challenges and Research Opportunities
inferred← citeshttps://doi.org/10.1109/msec.2023.3236999openalex-snapshot
Physical Inspection and Attacks on Electronics: An Academic Course for the Hardware Cybersecurity Workforce
inferred← citeshttps://doi.org/10.1109/mwscas.2018.8624085openalex-snapshot
A hardware obfuscation technique for manufacturing a secure 3D IC
inferred← citeshttps://doi.org/10.1109/mwscas.2019.8884968openalex-snapshot
Logic Obfuscation using Metasurface Holography
inferred← citeshttps://doi.org/10.1109/mwscas57524.2023.10406065openalex-snapshot
Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators
inferred← citeshttps://doi.org/10.1109/paine49178.2020.9337564openalex-snapshot
SHADE: Automated Refinement of PCB Component Estimates Using Detected Shadows
inferred← citeshttps://doi.org/10.1109/paine49178.2020.9337735openalex-snapshot
Tracking Cloned Electronic Components using a Consortium-based Blockchain Infrastructure
inferred← citeshttps://doi.org/10.1109/paine58317.2023.10318006openalex-snapshot
A Modular Blockchain Framework for Enabling Supply Chain Provenance
inferred← citeshttps://doi.org/10.1109/paine58317.2023.10318008openalex-snapshot
DeepICLogo: A Novel Benchmark Dataset for Deep Learning-Based IC Logo Detection
inferred← citeshttps://doi.org/10.1109/paine58317.2023.10318012openalex-snapshot
IPRec and Isoblaze: Fuzzy Subcircuit Isomorphism for IP Detection in Physical Netlists
inferred← citeshttps://doi.org/10.1109/paine62042.2024.10792768openalex-snapshot
CAKE-SiP: Chiplet Authenticate & Key Exchange for Secure Provisioning in System-in-Package
inferred← citeshttps://doi.org/10.1109/paine62042.2024.10792771openalex-snapshot
Mechanical Sample Preparation for Heterogeneous Integration(HI) Packaging
inferred← citeshttps://doi.org/10.1109/southeastcon42311.2019.9020347openalex-snapshot
Hardware Reverse Engineering Tools and Techniques
inferred← citeshttps://doi.org/10.1109/tale.2018.8615270openalex-snapshot
Teaching Hardware Reverse Engineering: Educational Guidelines and Practical Insights
inferred← citeshttps://doi.org/10.1109/tc.2019.2895329openalex-snapshot
An Ontology-Based Method for HW/SW Architecture Reconstruction
inferred← citeshttps://doi.org/10.1109/tc.2019.2953752openalex-snapshot
Graph Similarity and its Applications to Hardware Security
inferred← citeshttps://doi.org/10.1109/tc.2024.3449082openalex-snapshot
SCARF: Securing Chips With a Robust Framework Against Fabrication-Time Hardware Trojans
inferred← citeshttps://doi.org/10.1109/tcad.2017.2750088openalex-snapshot
Provably Secure Camouflaging Strategy for IC Protection
inferred← citeshttps://doi.org/10.1109/tcad.2018.2802870openalex-snapshot
Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation
inferred← citeshttps://doi.org/10.1109/tcad.2018.2864220openalex-snapshot
Toward a Formal and Quantitative Evaluation Framework for Circuit Obfuscation Methods
inferred← citeshttps://doi.org/10.1109/tcad.2019.2917856openalex-snapshot
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime
inferred← citeshttps://doi.org/10.1109/tcad.2019.2944586openalex-snapshot
Keynote: A Disquisition on Logic Locking
inferred← citeshttps://doi.org/10.1109/tcad.2019.2952133openalex-snapshot
A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding
inferred← citeshttps://doi.org/10.1109/tcad.2020.3047976openalex-snapshot
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools
inferred← citeshttps://doi.org/10.1109/tcad.2021.3073855openalex-snapshot
A Novel Algorithm for Hardware Trojan Detection Through Reverse Engineering
inferred← citeshttps://doi.org/10.1109/tcad.2021.3098740openalex-snapshot
Detecting Hardware Trojans Using Combined Self-Testing and Imaging
inferred← citeshttps://doi.org/10.1109/tcad.2022.3195676openalex-snapshot
CompressKey—Near Lossless Layout Compression and Encryption Using Convolutional Auto-Encoder Model and Expansion-Reduction Pattern Techniques
inferred← citeshttps://doi.org/10.1109/tcad.2022.3215796openalex-snapshot
HLock+: A Robust and Low-Overhead Logic Locking at the High-Level Language
inferred← citeshttps://doi.org/10.1109/tcad.2023.3240933openalex-snapshot
Complexity Analysis of the SAT Attack on Logic Locking
inferred← citeshttps://doi.org/10.1109/tcad.2023.3266368openalex-snapshot
FSMx-Ultra: Finite State Machine Extraction From Gate-Level Netlist for Security Assessment
inferred← citeshttps://doi.org/10.1109/tcad.2025.3541483openalex-snapshot
Hardware Trojan Design With Low Overhead and High Destructiveness for STT-MRAM-Based CIMs
inferred← citeshttps://doi.org/10.1109/tcad.2025.3607131openalex-snapshot
SALSy: Security-Aware Layout Synthesis
inferred← citeshttps://doi.org/10.1109/tce.2017.014722openalex-snapshot
Light-weight white-box encryption scheme with random padding for wearable consumer electronic devices
inferred← citeshttps://doi.org/10.1109/tcpmt.2016.2642824openalex-snapshot
PCB Reverse Engineering Using Nondestructive X-ray Tomography and Advanced Image Processing
inferred← citeshttps://doi.org/10.1109/tcpmt.2023.3311801openalex-snapshot
Exploring Advanced Packaging Technologies for Reverse Engineering a System-in-Package (SiP)
inferred← citeshttps://doi.org/10.1109/tdmr.2017.2656839openalex-snapshot
Impact of X-Ray Tomography on the Reliability of Integrated Circuits
inferred← citeshttps://doi.org/10.1109/tdsc.2018.2812183openalex-snapshot
HAL—The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion
inferred← citeshttps://doi.org/10.1109/test.2018.8624671openalex-snapshot
TimingSAT: Decamouflaging Timing-based Logic Obfuscation
inferred← citeshttps://doi.org/10.1109/tetc.2019.2933572openalex-snapshot
A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects
inferred← citeshttps://doi.org/10.1109/tetc.2023.3322299openalex-snapshot
Non-Invasive Reverse Engineering of One-Hot Finite State Machines Using Scan Dump Data
inferred← citeshttps://doi.org/10.1109/tifs.2018.2866333openalex-snapshot
Detection of Counterfeit ICs Using Public Identification Sequences and Side-Channel Leakage
inferred← citeshttps://doi.org/10.1109/tifs.2019.2900914openalex-snapshot
Security Implications of Intentional Capacitive Crosstalk
inferred← citeshttps://doi.org/10.1109/tifs.2019.2922237openalex-snapshot
Reverse Engineering of Printed Electronics Circuits: From Imaging to Netlist Extraction
inferred← citeshttps://doi.org/10.1109/tifs.2019.2926777openalex-snapshot
A PUF-Based Data-Device Hash for Tampered Image Detection and Source Camera Identification
inferred← citeshttps://doi.org/10.1109/tifs.2021.3101045openalex-snapshot
Memory-Based PUFs are Vulnerable as Well: A Non-Invasive Attack Against SRAM PUFs
inferred← citeshttps://doi.org/10.1109/tifs.2021.3123534openalex-snapshot
Identification of FSM State Registers by Analytics of Scan-Dump Data
inferred← citeshttps://doi.org/10.1109/tifs.2022.3172222openalex-snapshot
Selective Staining on Non-Volatile Memory Cells for Data Retrieval
inferred← citeshttps://doi.org/10.1109/tifs.2026.3651997openalex-snapshot
Portability of Profiling Side-Channel Analysis: A Case Study Using Adjustable Implementations of Block Ciphers
inferred← citeshttps://doi.org/10.1109/tvlsi.2018.2850807openalex-snapshot
An On-Chip Dynamically Obfuscated Wrapper for Protecting Supply Chain Against IP and IC Piracies
inferred← citeshttps://doi.org/10.1109/tvlsi.2019.2901449openalex-snapshot
Probing Assessment Framework and Evaluation of Antiprobing Solutions
inferred← citeshttps://doi.org/10.1109/tvlsi.2020.2979269openalex-snapshot
PUF-Based Secure Chaotic Random Number Generator Design Methodology
inferred← citeshttps://doi.org/10.1109/tvlsi.2020.3022776openalex-snapshot
A Printed Camouflaged Cell Against Reverse Engineering of Printed Electronics Circuits
inferred← citeshttps://doi.org/10.1109/tvlsi.2020.3023548openalex-snapshot
Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores
inferred← citeshttps://doi.org/10.1109/tvlsi.2021.3060345openalex-snapshot
Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits
inferred← citeshttps://doi.org/10.1109/tvlsi.2023.3296279openalex-snapshot
Hidden Costs of Analog Deobfuscation Attacks
inferred← citeshttps://doi.org/10.1109/tvlsi.2023.3337310openalex-snapshot
IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks
inferred← citeshttps://doi.org/10.1109/tvlsi.2024.3384531openalex-snapshot
FTC: A Universal Framework for Fault-Injection Attack Detection and Prevention
inferred← citeshttps://doi.org/10.1109/vlsi-soc62099.2024.10767797openalex-snapshot
A Novel Design Technique for Enhanced Security and New Applications of Ferroelectric-Based Non-Volatile SRAM
inferred← citeshttps://doi.org/10.1109/vts52500.2021.9794151openalex-snapshot
FSMx: Finite State Machine Extraction from Flattened Netlist With Application to Security
inferred← citeshttps://doi.org/10.1109/vts69484.2026.11563401openalex-snapshot
Structural Reconstruction of Analog Circuits Using Graph Neural Networks and Transformers
inferred← citeshttps://doi.org/10.1109/wacv51458.2022.00187openalex-snapshot
Automated Defect Inspection in Reverse Engineering of Integrated Circuits
inferred← citeshttps://doi.org/10.1145/2966986.2967065openalex-snapshot
Provably secure camouflaging strategy for IC protection
inferred← citeshttps://doi.org/10.1145/3024922openalex-snapshot
Pervasive, dynamic authentication of physical items
inferred← citeshttps://doi.org/10.1145/3028687.3047967openalex-snapshot
Pervasive, Dynamic Authentication of Physical Items
inferred← citeshttps://doi.org/10.1145/3060403.3060458openalex-snapshot
Cyclic Obfuscation for Creating SAT-Unresolvable Circuits
inferred← citeshttps://doi.org/10.1145/3060403.3060493openalex-snapshot
An Empirical Study on Gate Camouflaging Methods Against Circuit Partition Attack
inferred← citeshttps://doi.org/10.1145/3173462openalex-snapshot
A Chip-Level Anti-Reverse Engineering Technique
inferred← citeshttps://doi.org/10.1145/3287624.3288741openalex-snapshot
Towards cognitive obfuscation
inferred← citeshttps://doi.org/10.1145/3312614.3312656openalex-snapshot
On automating delayered IC analysis for hardware IP protection
inferred← citeshttps://doi.org/10.1145/3340557openalex-snapshot
Recent Attacks and Defenses on FPGA-based Systems
inferred← citeshttps://doi.org/10.1145/3342099openalex-snapshot
IP Protection and Supply Chain Security through Logic Obfuscation
inferred← citeshttps://doi.org/10.1145/3362752.3362753openalex-snapshot
Hardware Security-present and Future Trends
inferred← citeshttps://doi.org/10.1145/3386263.3407594openalex-snapshot
Is It Approximate Computing or Malicious Computing?
inferred← citeshttps://doi.org/10.1145/3433210.3453093openalex-snapshot
SoK: Enabling Security Analyses of Embedded Systems via Rehosting
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