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The Effects of Granularity and Adaptivity on Private/Shared Classification for Coherence
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/12.40842openalex-snapshot
Evaluating associativity in CPU caches
inferredcites →https://doi.org/10.1109/2.982916openalex-snapshot
Simics: A full system simulation platform
inferredcites →https://doi.org/10.1109/hpca.1999.744359openalex-snapshot
Improving CC-NUMA performance using Instruction-based Prediction
inferredcites →https://doi.org/10.1109/hpca.2008.4658652openalex-snapshot
An OS-based alternative to full hardware coherence on tiled CMPs
inferredcites →https://doi.org/10.1109/hpca.2011.5749726openalex-snapshot
Cuckoo directory: A scalable directory for many-core systems
inferredcites →https://doi.org/10.1109/ispass.2009.4919636openalex-snapshot
GARNET: A detailed on-chip network model inside a full-system simulator
inferredcites →https://doi.org/10.1109/micro.2012.39openalex-snapshot
Spatiotemporal Coherence Tracking
inferredcites →https://doi.org/10.1109/pact.2011.11openalex-snapshot
POPS: Coherence Protocol Optimization for Both Private and Shared Data
inferredcites →https://doi.org/10.1109/pact.2011.21openalex-snapshot
DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism
inferredcites →https://doi.org/10.1109/socc.2012.6398353openalex-snapshot
Efficient, snoopless, System-on-Chip coherence
inferredcites →https://doi.org/10.1145/1054943.1054949openalex-snapshot
Memory coherence activity prediction in commercial workloads
inferredcites →https://doi.org/10.1145/107971.107981openalex-snapshot
A model for estimating trace-sample miss ratios
inferredcites →https://doi.org/10.1145/1105734.1105747openalex-snapshot
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
inferredcites →https://doi.org/10.1145/165123.165146openalex-snapshot
Adaptive cache coherency for detecting migratory shared data
inferredcites →https://doi.org/10.1145/165123.165147openalex-snapshot
An adaptive cache coherence protocol optimized for migratory sharing
inferredcites →https://doi.org/10.1145/1854273.1854335openalex-snapshot
Compiler-assisted data distribution for chip multiprocessors
inferredcites →https://doi.org/10.1145/2000064.2000076openalex-snapshot
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
inferredcites →https://doi.org/10.1145/2370816.2370853openalex-snapshot
Complexity-effective multicore coherence
inferredcites →https://doi.org/10.1145/2485922.2485968openalex-snapshot
A new perspective for efficient virtual-cache coherence
inferredcites →https://doi.org/10.1145/2540708.2540739openalex-snapshot
Multi-grain coherence directories
inferredcites →https://doi.org/10.1145/325164.325100openalex-snapshot
Weak ordering---a new definition
inferredcites →https://doi.org/10.1145/379240.379259openalex-snapshot
Dead-block prediction & dead-block correlating prefetchers
inferredcites →https://doi.org/10.2200/s00346ed1v01y201104cac016openalex-snapshot
A Primer on Memory Consistency and Cache Coherence
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/cpe.3871openalex-snapshot
A dedicated private‐shared cache design for scalable multiprocessors
inferred← citeshttps://doi.org/10.1016/j.jpdc.2021.07.005openalex-snapshot
Efficient classification of private memory blocks
inferred← citeshttps://doi.org/10.1016/j.jpdc.2022.09.004openalex-snapshot
Fine-grain data classification to filter token coherence traffic
inferred← citeshttps://doi.org/10.1109/hpca.2017.25openalex-snapshot
A Split Cache Hierarchy for Enabling Data-Oriented Optimizations
inferred← citeshttps://doi.org/10.1109/iceeot.2016.7755093openalex-snapshot
Cache coherence: A walkthrough of mechanisms and challenges
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00049openalex-snapshot
Dorado: Clustered Hardware Cache Coherence for 1,000+ Cores
inferred← citeshttps://doi.org/10.1109/pact.2015.23openalex-snapshot
An Efficient, Self-Contained, On-chip Directory: DIR1-SISD
inferred← citeshttps://doi.org/10.1109/pdp50117.2020.00025openalex-snapshot
TLB-based Block-Grain Classification of Private Data
inferred← citeshttps://doi.org/10.1109/rise.2017.8378186openalex-snapshot
Analysis of multi-core cache coherence protocols from energy and performance perspective
inferred← citeshttps://doi.org/10.1109/tcad.2017.2729280openalex-snapshot
Classifying Data Blocks at Subpage Granularity With an On-Chip Page Table to Improve Coherence in Tiled CMPs
inferred← citeshttps://doi.org/10.1109/tpds.2016.2528241openalex-snapshot
A Hybrid Static-Dynamic Classification for Dual-Consistency Cache Coherence
inferred← citeshttps://doi.org/10.1145/3530819openalex-snapshot
A Case for Fine-grain Coherence Specialization in Heterogeneous Systems
inferred← citeshttps://doi.org/10.4995/thesis/10251/86136openalex-snapshot
Design of Efficient TLB-based Data Classification Mechanisms in Chip Multiprocessors
inferred← citeshttps://doi.org/10.4995/thesis/10251/86187openalex-snapshot
Design of Efficient TLB-based Data Classification Mechanisms in Chip Multiprocessors
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