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Hierarchical Dynamic Thermal Management Method for High-Performance Many-Core Microprocessors
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Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/2.869367openalex-snapshot
SPEC CPU2000: measuring CPU performance in the New Millennium
inferredcites →https://doi.org/10.1109/apccas.2014.7032888openalex-snapshot
Hybrid dynamic thermal management method with model predictive control
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Approximation-aware scheduling on heterogeneous multi-core architectures
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Multicore thermal management with model predictive control
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Dynamic thermal management for high-performance microprocessors
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Techniques for Multicore Thermal Management: Classification and New Exploration
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Adaptive Task Migration Policies for Thermal Control in MPSoCs
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Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors
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A Landscape of the New Dark Silicon Design Regime
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Energy-Efficient Operation of Multicore Processors by DVFS, Task Migration, and Active Cooling
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Performance Optimal Online DVFS and Task Migration Techniques for Thermally Constrained Multi-Core Processors
inferredcites →https://doi.org/10.1109/tcsi.2008.2011589openalex-snapshot
Processor Speed Control With Thermal Constraints
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Thermal and Energy Management of High-Performance Multicores: Distributed and Self-Calibrating Model-Predictive Controller
inferredcites →https://doi.org/10.1109/tvlsi.2006.876103openalex-snapshot
HotSpot: a compact thermal modeling methodology for early-stage VLSI design
inferredcites →https://doi.org/10.1109/tvlsi.2010.2058873openalex-snapshot
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
inferredcites →https://doi.org/10.1145/1150019.1136493openalex-snapshot
Techniques for Multicore Thermal Management
inferredcites →https://doi.org/10.1145/1531542.1531577openalex-snapshot
Central vs. distributed dynamic thermal management for multi-core processors
inferredcites →https://doi.org/10.1145/1555754.1555794openalex-snapshot
Temperature-constrained power control for chip multiprocessors with online model estimation
inferredcites →https://doi.org/10.1145/1687399.1687459openalex-snapshot
A hybrid local-global approach for multi-core thermal management
inferredcites →https://doi.org/10.1145/1837274.1837417openalex-snapshot
Distributed task migration for thermal management in many-core systems
inferredcites →https://doi.org/10.1145/2333660.2333737openalex-snapshot
Energy-efficient scheduling on heterogeneous multi-core architectures
inferredcites →https://doi.org/10.1145/240518.240538openalex-snapshot
A probability-based approach to VLSI circuit partitioning
inferredcites →https://doi.org/10.1145/2463209.2488949openalex-snapshot
Hierarchical power management for asymmetric multi-core in dark silicon era
inferredcites →https://doi.org/10.1145/2593069.2593229openalex-snapshot
The EDA Challenges in the Dark Silicon Era
inferredcites →https://doi.org/10.1145/2744769.2744916openalex-snapshot
Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips
inferredcites →https://doi.org/10.1145/859618.859620openalex-snapshot
Temperature-aware microarchitecture
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inferred← citeshttps://doi.org/10.1109/tcad.2018.2877019openalex-snapshot
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inferred← citeshttps://doi.org/10.1109/tcad.2021.3058959openalex-snapshot
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inferred← citeshttps://doi.org/10.1109/tcpmt.2024.3374107openalex-snapshot
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inferred← citeshttps://doi.org/10.1109/tii.2019.2960414openalex-snapshot
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inferred← citeshttps://doi.org/10.1109/tsusc.2018.2823542openalex-snapshot
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FaStTherm: Fast and Stable Full-Chip Transient Thermal Predictor Considering Nonlinear Effects
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