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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/cgo.2003.1191529openalex-snapshot
The Transmeta Code Morphing/spl trade/ Software: using speculation, recovery, and adaptive retranslation to address real-life challenges
inferredcites →https://doi.org/10.1109/mm.2015.12openalex-snapshot
Denver: Nvidia's First 64-bit ARM Processor
inferredcites →https://doi.org/10.1126/science.22.559.345openalex-snapshot
The Massachusetts Institute of Technology
inferredcites →https://doi.org/10.1145/1168857.1168860openalex-snapshot
A comparison of software and hardware techniques for x86 virtualization
inferredcites →https://doi.org/10.1145/1168918.1168860openalex-snapshot
A comparison of software and hardware techniques for x86 virtualization
inferredcites →https://doi.org/10.1145/1176760.1176793openalex-snapshot
A dynamic binary instrumentation engine for the ARM architecture
inferredcites →https://doi.org/10.1145/1186736.1186737openalex-snapshot
SPEC CPU2006 benchmark descriptions
inferredcites →https://doi.org/10.1145/1242531.1242554openalex-snapshot
Identifying potential parallelism via loop-centric profiling
inferredcites →https://doi.org/10.1145/1815695.1815724openalex-snapshot
Generating low-overhead dynamic binary translators
inferredcites →https://doi.org/10.1145/1952682.1952688openalex-snapshot
Dynamic cache contention detection in multi-threaded applications
inferredcites →https://doi.org/10.1145/2007477.1952688openalex-snapshot
Dynamic cache contention detection in multi-threaded applications
inferredcites →https://doi.org/10.1145/2016604.2016634openalex-snapshot
On-the-fly detection of precise loop nests across procedures on a dynamic binary translation system
inferredcites →https://doi.org/10.1145/2714576.2714635openalex-snapshot
The Performance Cost of Shadow Stacks and Stack Canaries
inferredcites →https://doi.org/10.5555/776261.776263openalex-snapshot
The Transmeta Code Morphing/spl trade/ Software: using speculation, recovery, and adaptive retranslation to address real-life challenges
inferredcites →https://doi.org/10.5555/956417.956565openalex-snapshot
Hardware support for control transfers in code caches
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-031-22941-1_37openalex-snapshot
Root Causing MPI Workloads Imbalance Issues via Scalable MPI Critical Path Analysis
inferred← citeshttps://doi.org/10.1007/978-3-032-35248-4_5openalex-snapshot
MemBridge: Bridging the Static-Dynamic Semantic Gap in Memory Profiling via Variable-Centric Instrumentation
inferred← citeshttps://doi.org/10.1007/s10009-021-00644-wopenalex-snapshot
SaBRe: load-time selective binary rewriting
inferred← citeshttps://doi.org/10.1007/s10207-021-00568-1openalex-snapshot
Data space randomization for securing cyber-physical systems
inferred← citeshttps://doi.org/10.1016/j.adhoc.2024.103546openalex-snapshot
A method for analyzing the impact of SEUs on satellite networks from the perspective of distributed routing
inferred← citeshttps://doi.org/10.1016/j.micpro.2019.102954openalex-snapshot
Integrated moving target defense and control reconfiguration for securing Cyber-Physical systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2022.102420openalex-snapshot
Moving target defense for the security and resilience of mixed time and event triggered cyber–physical systems
inferred← citeshttps://doi.org/10.1016/j.sysarc.2023.103022openalex-snapshot
COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications
inferred← citeshttps://doi.org/10.1109/fccm.2017.36openalex-snapshot
The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation
inferred← citeshttps://doi.org/10.1109/fccm.2019.00031openalex-snapshot
SimAcc: A Configurable Cycle-Accurate Simulator for Customized Accelerators on CPU-FPGAs SoCs
inferred← citeshttps://doi.org/10.1109/isorc49007.2020.00022openalex-snapshot
Security in Mixed Time and Event Triggered Cyber-Physical Systems using Moving Target Defense
inferred← citeshttps://doi.org/10.1109/ispass.2018.00030openalex-snapshot
Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces
inferred← citeshttps://doi.org/10.1109/ispass57527.2023.00017openalex-snapshot
Evaluating the Impact of Optimizations for Dynamic Binary Modification on 64-bit RISC-V
inferred← citeshttps://doi.org/10.1109/ispass61541.2024.00014openalex-snapshot
BTBench: A Benchmark for Comprehensive Binary Translation Performance Evaluation
inferred← citeshttps://doi.org/10.1109/jproc.2018.2856739openalex-snapshot
Navigating the Landscape for Real-Time Localization and Mapping for Robotics and Virtual and Augmented Reality
inferred← citeshttps://doi.org/10.1145/3184407.3184425openalex-snapshot
Optimising Dynamic Binary Modification Across ARM Microarchitectures
inferred← citeshttps://doi.org/10.1145/3190619.3190636openalex-snapshot
Integrated instruction set randomization and control reconfiguration for securing cyber-physical systems
inferred← citeshttps://doi.org/10.1145/3191697.3191729openalex-snapshot
On the future of research VMs: a hardware/software perspective
inferred← citeshttps://doi.org/10.1145/3314058.3314064openalex-snapshot
Integrated data space randomization and control reconfiguration for securing cyber-physical systems
inferred← citeshttps://doi.org/10.1145/3377555.3377895openalex-snapshot
Balancing performance and productivity for the development of dynamic binary instrumentation tools: a case study on Arm systems
inferred← citeshttps://doi.org/10.1145/3485832.3488019openalex-snapshot
FlexFilt: Towards Flexible Instruction Filtering for Security
inferred← citeshttps://doi.org/10.1145/3560834.3563830openalex-snapshot
SpecDefender: Transient Execution Attack Defender using Performance Counters
inferred← citeshttps://doi.org/10.1145/3691620.3695515openalex-snapshot
LeanBin: Harnessing Lifting and Recompilation to Debloat Binaries
inferred← citeshttps://doi.org/10.1145/3735452.3735524openalex-snapshot
ASC-Hook: Efficient System Call Interception for ARM
inferred← citeshttps://doi.org/10.3103/s0146411620080246openalex-snapshot
Application of Taint Analysis to Study the Safety of Software of the Internet of Things Devices Based on the ARM Architecture
inferred← citeshttps://doi.org/10.3389/ffutr.2021.792573openalex-snapshot
A Tutorial on Moving Target Defense Approaches Within Automotive Cyber-Physical Systems
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