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Parallel SystemC Simulation for ESL Design
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1109/2.982916openalex-snapshot
Simics: A full system simulation platform
inferredcites →https://doi.org/10.1109/aspdac.2012.6164949openalex-snapshot
Parallel discrete event simulation of Transaction Level Models
inferredcites →https://doi.org/10.1109/aspdac.2012.6164991openalex-snapshot
Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs
inferredcites →https://doi.org/10.1109/dasip.2011.6136847openalex-snapshot
A systemc TLM framework for distributed simulation of complex systems with unpredictable communication
inferredcites →https://doi.org/10.1109/fdl.2014.7119360openalex-snapshot
Distributed, loosely-synchronized systemC/TLM simulations of many-processor platforms
inferredcites →https://doi.org/10.1109/icsamos.2010.5642102openalex-snapshot
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
inferredcites →https://doi.org/10.1109/ieeestd.2006.99475openalex-snapshot
IEEE Standard System C Language Reference Manual
inferredcites →https://doi.org/10.1109/iscas.2014.6865424openalex-snapshot
SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading
inferredcites →https://doi.org/10.1109/ispa.2014.32openalex-snapshot
EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems
inferredcites →https://doi.org/10.1109/mdat.2021.3065318openalex-snapshot
The 2021 Asia and South Pacific Design Automation Conference (ASPDAC)
inferredcites →https://doi.org/10.1109/samos.2014.6893218openalex-snapshot
Highly-parallel special-purpose multicore architecture for SystemC/TLM simulations
inferredcites →https://doi.org/10.1109/samos.2015.7363702openalex-snapshot
Parallel SystemC simulation for ESL design using flexible time decoupling
inferredcites →https://doi.org/10.1109/tpds.2014.2319092openalex-snapshot
GPU Acceleration for Simulating Massively Parallel Many-Core Platforms
inferredcites →https://doi.org/10.1109/wsc.2001.977259openalex-snapshot
Parallel and distributed simulation systems
inferredcites →https://doi.org/10.5555/1870926.1871212openalex-snapshot
Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs
inferredcites →https://doi.org/10.5555/2616606.2617019openalex-snapshot
Automatic detection of concurrency bugs through event ordering constraints
inferredcites →https://doi.org/10.5555/2616606.2617025openalex-snapshot
May-happen-in-parallel analysis based on segment graphs for safe ESL models
inferredcites →https://doi.org/10.7873/date.2013.017openalex-snapshot
Parallel Programming with SystemC for Loosely Timed Models: A Non-Intrusive Approach
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-030-33614-1_4openalex-snapshot
Image Analysis Based on Heterogeneous Architectures for Precision Agriculture: A Systematic Literature Review
inferred← citeshttps://doi.org/10.1007/978-3-031-46077-7_12openalex-snapshot
parti-gem5: gem5’s Timing Mode Parallelised
inferred← citeshttps://doi.org/10.1007/s10766-026-00819-5openalex-snapshot
Scalable and Accurate Parallel Timing Simulations with parti-gem5
inferred← citeshttps://doi.org/10.1007/s11227-018-2682-1openalex-snapshot
PSML: parallel system modeling and simulation language for electronic system level
inferred← citeshttps://doi.org/10.1016/j.vlsi.2020.12.006openalex-snapshot
Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support
inferred← citeshttps://doi.org/10.1109/dsd53832.2021.00029openalex-snapshot
Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
inferred← citeshttps://doi.org/10.1109/tpds.2018.2860014openalex-snapshot
Optimistic Modeling and Simulation of Complex Hardware Platforms and Embedded Systems on Many-Core HPC Clusters
inferred← citeshttps://doi.org/10.1145/3061639.3062243openalex-snapshot
Exploiting Thread and Data Level Parallelism for Ultimate Parallel SystemC Simulation
inferred← citeshttps://doi.org/10.1145/3649329.3658257openalex-snapshot
Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU Models
inferred← citeshttps://doi.org/10.1145/3735641openalex-snapshot
A Systematic Mapping Study on SystemC/TLM Modeling Capabilities in New Research Domains
inferred← citeshttps://doi.org/10.1145/3787501.3787502openalex-snapshot
ARCADES: A RISC-V-Coupled Accelerator for Discrete Event Simulation
inferred← citeshttps://doi.org/10.3390/electronics10060759openalex-snapshot
Enabling Parallelized-QEMU for Hardware/Software Co-Simulation Virtual Platforms
inferred← citeshttps://doi.org/10.35537/10915/149069openalex-snapshot
Algoritmos para agricultura de precisión utilizando computación de alto rendimiento
inferred← citeshttps://doi.org/10.70675/e095c17czd8a1z468bz95f9z40f8140ea3eeopenalex-snapshot
Parallel Standard-Compliant SystemC Simulation of Loosely-Timed Transaction Level Models
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