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Cache Exclusivity and Sharing
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Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/978-3-642-11515-8_16openalex-snapshot
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
inferredcites →https://doi.org/10.1007/s11390-014-1460-7openalex-snapshot
Performance Metrics and Models for Shared Cache
inferredcites →https://doi.org/10.1109/12.40842openalex-snapshot
Evaluating associativity in CPU caches
inferredcites →https://doi.org/10.1109/hotchips.2016.7936224openalex-snapshot
A new ×86 core architecture for the next generation of computing
inferredcites →https://doi.org/10.1109/hpca.2005.27openalex-snapshot
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
inferredcites →https://doi.org/10.1109/hpca.2013.6522315openalex-snapshot
Modeling performance variation due to cache sharing
inferredcites →https://doi.org/10.1109/hpca.2014.6835955openalex-snapshot
A detailed GPU cache model based on reuse distance theory
inferredcites →https://doi.org/10.1109/hpca.2016.7446067openalex-snapshot
Modeling cache performance beyond LRU
inferredcites →https://doi.org/10.1109/hpca.2016.7446102openalex-snapshot
Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family
inferredcites →https://doi.org/10.1109/icppw.2010.38openalex-snapshot
LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments
inferredcites →https://doi.org/10.1109/ispass.2006.1620793openalex-snapshot
A statistical multiprocessor cache model
inferredcites →https://doi.org/10.1109/ispass.2010.5452069openalex-snapshot
StatStack: Efficient modeling of LRU caches
inferredcites →https://doi.org/10.1109/micro.2014.20openalex-snapshot
PORPLE: An Extensible Optimizer for Portable Data Placement on GPU
inferredcites →https://doi.org/10.1109/mm.2007.43openalex-snapshot
The AMD Opteron Northbridge Architecture
inferredcites →https://doi.org/10.1109/mm.2012.22openalex-snapshot
Increasing Utilization in Modern Warehouse-Scale Computers Using Bubble-Up
inferredcites →https://doi.org/10.1109/pact.2011.66openalex-snapshot
Linear-time Modeling of Program Working Set in Shared Cache
inferredcites →https://doi.org/10.1109/tpds.2011.130openalex-snapshot
The Significance of CMP Cache Sharing on Contemporary Multithreaded Applications
inferredcites →https://doi.org/10.1145/1005686.1005691openalex-snapshot
Cross-architecture performance predictions for scientific applications using parameterized models
inferredcites →https://doi.org/10.1145/1024393.1024415openalex-snapshot
Dynamic tracking of page miss ratio curve for memory management
inferredcites →https://doi.org/10.1145/1190215.1190227openalex-snapshot
Locality approximation using time
inferredcites →https://doi.org/10.1145/1190216.1190227openalex-snapshot
Locality approximation using time
inferredcites →https://doi.org/10.1145/1250662.1250709openalex-snapshot
Adaptive insertion policies for high performance caching
inferredcites →https://doi.org/10.1145/1375634.1375648openalex-snapshot
Sampling-based program locality approximation
inferredcites →https://doi.org/10.1145/1519065.1519076openalex-snapshot
Towards practical page coloring-based multicore cache management
inferredcites →https://doi.org/10.1145/1735970.1736036openalex-snapshot
Addressing shared resource contention in multicore processors via scheduling
inferredcites →https://doi.org/10.1145/1736020.1736033openalex-snapshot
Probabilistic job symbiosis modeling for SMT processor scheduling
inferredcites →https://doi.org/10.1145/1736020.1736036openalex-snapshot
Addressing shared resource contention in multicore processors via scheduling
inferredcites →https://doi.org/10.1145/1815961.1815971openalex-snapshot
High performance cache replacement using re-reference interval prediction (RRIP)
inferredcites →https://doi.org/10.1145/1816038.1815971openalex-snapshot
High performance cache replacement using re-reference interval prediction (RRIP)
inferredcites →https://doi.org/10.1145/1854273.1854286openalex-snapshot
Accelerating multicore reuse distance analysis with sampling and parallelization
inferredcites →https://doi.org/10.1145/1899928.1899931openalex-snapshot
Online cache modeling for commodity multicore processors
inferredcites →https://doi.org/10.1145/1941553.1941567openalex-snapshot
All-window profiling and composable models of cache sharing
inferredcites →https://doi.org/10.1145/1944862.1944885openalex-snapshot
Fast modeling of shared caches in multicore systems
inferredcites →https://doi.org/10.1145/2427631.2427632openalex-snapshot
Efficient Reuse Distance Analysis of Multicore Scaling for Loop-Based Parallel Programs
inferredcites →https://doi.org/10.1145/244804.244808openalex-snapshot
Modeling cost/performance of a parallel computer simulator
inferredcites →https://doi.org/10.1145/2465529.2465756openalex-snapshot
Reuse-based online models for caches
inferredcites →https://doi.org/10.1145/2485922.2485965openalex-snapshot
Studying multicore processor scaling via reuse distance analysis
inferredcites →https://doi.org/10.1145/2591635.2667181openalex-snapshot
Analytical cache models with applications to cache partitioning
inferredcites →https://doi.org/10.1145/285930.285998openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache prefetch buffers
inferredcites →https://doi.org/10.1145/325164.325162openalex-snapshot
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
inferredcites →https://doi.org/10.1145/356989.357011openalex-snapshot
Symbiotic jobscheduling for a simultaneous mutlithreading processor
inferredcites →https://doi.org/10.1145/357980.357997openalex-snapshot
The working set model for program behavior
inferredcites →https://doi.org/10.1145/359588.359598openalex-snapshot
Generalized working sets for segment reference strings
inferredcites →https://doi.org/10.1145/361268.361281openalex-snapshot
Properties of the working-set model
inferredcites →https://doi.org/10.1145/363095.363141openalex-snapshot
The working set model for program behavior
inferredcites →https://doi.org/10.1145/377792.377797openalex-snapshot
Analytical cache models with applications to cache partitioning
inferredcites →https://doi.org/10.1145/378993.379244openalex-snapshot
Symbiotic jobscheduling for a simultaneous multithreaded processor
inferredcites →https://doi.org/10.1147/sj.92.0078openalex-snapshot
Evaluation techniques for storage hierarchies
inferredcites →https://doi.org/10.14288/1.0166992openalex-snapshot
A streaming algorithms approach to approximating hit rate curves
inferredcites →https://doi.org/10.48550/arxiv.1104.4874openalex-snapshot
LIKWID: Lightweight Performance Tools
inferredcites →https://doi.org/10.5555/1298455.1298466openalex-snapshot
CRAMM: virtual memory support for garbage-collected applications
inferredcites →https://doi.org/10.5555/2685048.2685075openalex-snapshot
Characterizing storage workloads with counter stacks
inferredcites →https://doi.org/10.5555/2750482.2750490openalex-snapshot
Efficient MRC construction with SHARDS
inferredcites →https://doi.org/10.5555/800253.807689openalex-snapshot
On the effectiveness of set associative page mapping and its application to main memory management
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/978-3-030-01689-0_9openalex-snapshot
Optimal Partitioning of LLC in CAT-enabled CPUs to Prevent Side-Channel Attacks
inferred← citeshttps://doi.org/10.1007/978-3-030-17227-5_12openalex-snapshot
HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing
inferred← citeshttps://doi.org/10.1007/978-3-319-98935-8_7openalex-snapshot
Automatic Application of Software Countermeasures Against Physical Attacks
inferred← citeshttps://doi.org/10.1007/s11227-026-08457-xopenalex-snapshot
Bicameral+ Cache: re-assessing split vector and scalar cache designs for increased efficiency
inferred← citeshttps://doi.org/10.1109/cluster.2019.8891025openalex-snapshot
Rapidly Measuring Loop Footprints
inferred← citeshttps://doi.org/10.1109/ipdpsw71298.2026.00044openalex-snapshot
Deriving Symbolic AET Using Locality Identity Equation
inferred← citeshttps://doi.org/10.1109/ispass48437.2020.00047openalex-snapshot
Rapid Memory Footprint Access Diagnostics
inferred← citeshttps://doi.org/10.1145/3192366.3192402openalex-snapshot
Locality analysis through static parallel sampling
inferred← citeshttps://doi.org/10.1145/3210563.3210565openalex-snapshot
Prediction and bounds on shared cache demand from memory access interleaving
inferred← citeshttps://doi.org/10.1145/3296979.3192402openalex-snapshot
Locality analysis through static parallel sampling
inferred← citeshttps://doi.org/10.1145/3299706.3210565openalex-snapshot
Prediction and bounds on shared cache demand from memory access interleaving
inferred← citeshttps://doi.org/10.1145/3459898.3463908openalex-snapshot
Uniform lease vs. LRU cache: analysis and evaluation
inferred← citeshttps://doi.org/10.1145/3656019.3676948openalex-snapshot
Parallel Loop Locality Analysis for Symbolic Thread Counts
inferred← citeshttps://doi.org/10.1145/3656452openalex-snapshot
Falcon: A Scalable Analytical Cache Model
inferred← citeshttps://doi.org/10.1145/3695794.3695806openalex-snapshot
Measuring Data Access Latency in Large CPU Caches
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