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goSLP: globally optimized superword level parallelism framework

https://doi.org/10.1145/3276480
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Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-540-71229-9_9openalex-snapshot
Register Allocation and Optimal Spill Code Scheduling in Software Pipelined Loops Using 0-1 Integer Linear Programming Formulation
inferredcites →https://doi.org/10.1016/s0898-1221(97)00184-3openalex-snapshot
Using integer linear programming for instruction scheduling and register allocation in multi-issue processors
inferredcites →https://doi.org/10.1023/a:1007559022013openalex-snapshot
A Vectorizing Compiler for Multimedia Extensions
inferredcites →https://doi.org/10.1109/40.755466openalex-snapshot
AMD 3DNow! technology: architecture and implementations
inferredcites →https://doi.org/10.1109/cgo.2005.33openalex-snapshot
Superword-Level Parallelism in the Presence of Control Flow
inferredcites →https://doi.org/10.1109/micro.2010.38openalex-snapshot
Efficient Selection of Vector Instructions Using Dynamic Programming
inferredcites →https://doi.org/10.1109/pact.2009.18openalex-snapshot
Polyhedral-Model Guided Loop-Nest Auto-Vectorization
inferredcites →https://doi.org/10.1109/pact.2015.32openalex-snapshot
Throttling Automatic Vectorization: When Less is More
inferredcites →https://doi.org/10.1145/1065910.1065931openalex-snapshot
Generation of permutations for SIMD processors
inferredcites →https://doi.org/10.1145/1133981.1133996openalex-snapshot
Optimizing data permutations for SIMD devices
inferredcites →https://doi.org/10.1145/1133981.1133997openalex-snapshot
Auto-vectorization of interleaved data for SIMD
inferredcites →https://doi.org/10.1145/1186736.1186737openalex-snapshot
SPEC CPU2006 benchmark descriptions
inferredcites →https://doi.org/10.1145/1379022.1375609openalex-snapshot
Register allocation by puzzle solving
inferredcites →https://doi.org/10.1145/1454115.1454119openalex-snapshot
Outer-loop vectorization
inferredcites →https://doi.org/10.1145/2151024.2151043openalex-snapshot
Transparent dynamic instrumentation
inferredcites →https://doi.org/10.1145/2254064.2254106openalex-snapshot
A compiler framework for extracting superword level parallelism
inferredcites →https://doi.org/10.1145/2491956.2462187openalex-snapshot
When polyhedral transformations meet SIMD code generation
inferredcites →https://doi.org/10.1145/2854038.2854046openalex-snapshot
Exploiting recent SIMD architectural advances for irregular applications
inferredcites →https://doi.org/10.1145/2854038.2854054openalex-snapshot
Exploiting mixed SIMD parallelism by reducing data reorganization overhead
inferredcites →https://doi.org/10.1145/2908080.2908111openalex-snapshot
FlexVec: auto-vectorization for irregular loops
inferredcites →https://doi.org/10.1145/29873.29875openalex-snapshot
Automatic translation of FORTRAN programs to vector form
inferredcites →https://doi.org/10.1145/343647.343679openalex-snapshot
Code selection for media processors with SIMD instructions
inferredcites →https://doi.org/10.1145/349299.349320openalex-snapshot
Exploiting superword level parallelism with multimedia instruction sets
inferredcites →https://doi.org/10.1145/378795.378854openalex-snapshot
Optimal spilling for CISC machines with few registers
inferredcites →https://doi.org/10.1145/996841.996853openalex-snapshot
Vectorization for SIMD architectures with alignment constraints
inferredcites →https://doi.org/10.1561/0400000002openalex-snapshot
Data Streams: Algorithms and Applications

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-030-72789-5_2openalex-snapshot
PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code
inferred← citeshttps://doi.org/10.1007/s10766-026-00829-3openalex-snapshot
A Review of Compiler Optimization Techniques and Comparative Analysis for RISC-V Software Development
inferred← citeshttps://doi.org/10.1007/s42514-023-00160-0openalex-snapshot
Uncovering the performance bottleneck of modern HPC processor with static code analyzer: a case study on Kunpeng 920
inferred← citeshttps://doi.org/10.1007/s42514-026-00274-1openalex-snapshot
Directive-based automatic function-level vectorization for simplified SIMD exploitation
inferred← citeshttps://doi.org/10.1016/j.envsoft.2023.105914openalex-snapshot
The Strategic Random Search (SRS) – A new global optimizer for calibrating hydrological models
inferred← citeshttps://doi.org/10.1109/cgo.2019.8661192openalex-snapshot
Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements
inferred← citeshttps://doi.org/10.1109/icde55515.2023.00387openalex-snapshot
Co-Utilizing SIMD and Scalar to Accelerate the Data Analytics Workloads
inferred← citeshttps://doi.org/10.1109/iiswc47752.2019.9042166openalex-snapshot
BHive: A Benchmark Suite and Measurement Framework for Validating x86-64 Basic Block Performance Models
inferred← citeshttps://doi.org/10.1109/iiswc59245.2023.00023openalex-snapshot
Facile: Fast, Accurate, and Interpretable Basic-Block Throughput Prediction
inferred← citeshttps://doi.org/10.1109/llvm-hpc56686.2022.00006openalex-snapshot
Reinforcement Learning assisted Loop Distribution for Locality and Vectorization
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00045openalex-snapshot
DiffTune: Optimizing CPU Simulator Parameters with Learned Differentiable Surrogates
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00044openalex-snapshot
GCD2: A Globally Optimizing Compiler for Mapping DNNs to Mobile DSPs
inferred← citeshttps://doi.org/10.1145/3372799.3397167openalex-snapshot
Compiler 2.0
inferred← citeshttps://doi.org/10.1145/3445814.3446692openalex-snapshot
VeGen: a vectorizer generator for SIMD and beyond
inferred← citeshttps://doi.org/10.1145/3494523openalex-snapshot
A Survey of Machine Learning for Computer Architecture and Systems
inferred← citeshttps://doi.org/10.1145/3519939.3523701openalex-snapshot
All you need is superword-level parallelism: systematic control-flow vectorization with SLP
inferred← citeshttps://doi.org/10.1145/3524059.3532396openalex-snapshot
uiCA
inferred← citeshttps://doi.org/10.1145/3582016.3582057openalex-snapshot
Coyote: A Compiler for Vectorizing Encrypted Arithmetic Circuits
inferred← citeshttps://doi.org/10.1145/3617232.3624862openalex-snapshot
Lightweight, Modular Verification for WebAssembly-to-Native Instruction Selection
inferred← citeshttps://doi.org/10.1145/3617232.3624873openalex-snapshot
Automatic Generation of Vectorizing Compilers for Customizable Digital Signal Processors
inferred← citeshttps://doi.org/10.1145/3620666.3651333openalex-snapshot
Boost Linear Algebra Computation Performance via Efficient VNNI Utilization
inferred← citeshttps://doi.org/10.1145/3623278.3624768openalex-snapshot
Fast Instruction Selection for Fast Digital Signal Processing
inferred← citeshttps://doi.org/10.1145/3656382openalex-snapshot
A Tensor Compiler with Automatic Data Packing for Simple and Efficient Fully Homomorphic Encryption
inferred← citeshttps://doi.org/10.1145/3696443.3708917openalex-snapshot
Qiwu: Exploiting Ciphertext-Level SIMD Parallelism in Homomorphic Encryption Programs
inferred← citeshttps://doi.org/10.1145/3696443.3708950openalex-snapshot
Scalar Interpolation: A Better Balance between Vector and Scalar Execution for SuperScalar Architectures
inferred← citeshttps://doi.org/10.1145/3771775.3786269openalex-snapshot
CHEHAB: Automatic Compiler Code Optimization for Fully Homomorphic Encryption
inferred← citeshttps://doi.org/10.1145/3779212.3790138openalex-snapshot
CHEHAB RL: Learning to Optimize Fully Homomorphic Encryption Computations
inferred← citeshttps://doi.org/10.1155/2021/3264624openalex-snapshot
Evaluation of Compilers’ Capability of Automatic Vectorization Based on Source Code Analysis
inferred← citeshttps://doi.org/10.1155/2022/1832522openalex-snapshot
An SLP Vectorization Method Based on Equivalent Extended Transformation
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