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Efficient Selection of Vector Instructions Using Dynamic Programming
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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Compiler optimizations for processors with SIMD instructions
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Compilation Techniques for Multimedia Processors
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MMX technology extension to the Intel architecture
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AltiVec extension to PowerPC accelerates media processing
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Exploiting Vector Parallelism in Software Pipelined Loops
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Increasing and detecting memory address congruence
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A high-performance SIMD floating point unit for BlueGene/L: architecture, compilation, and algorithm design
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Generation of permutations for SIMD processors
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Near-optimal instruction selection on dags
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The Jalapeño dynamic optimizing compiler for Java
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Code Generation for a One-Register Machine
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Code selection for media processors with SIMD instructions
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Exploiting superword level parallelism with multimedia instruction sets
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Register-sensitive selection, duplication, and sequencing of instructions
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Optimal code generation for expression trees
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Vectorization for SIMD architectures with alignment constraints
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Vectorization for SIMD architectures with alignment constraints
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The NAS Parallel Benchmarks
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A High-Performance SIMD Floating Point Unit for BlueGene/L: Architecture, Compilation, and Algorithm Design
inferredcites →https://doi.org/10.5555/645989.674329openalex-snapshot
Increasing and detecting memory address congruence
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Vector data flow analysis for SIMD optimizations on OpenCL programs
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Performance Evaluation of NPB and SPEC CPU2006 on Various SIMD Extensions
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Optimizations of the Whole Function Vectorization Based on SIMD Characteristics
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Automated Compiler Optimization of Multiple Vector Loads/Stores
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A Review of Compiler Optimization Techniques and Comparative Analysis for RISC-V Software Development
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Evolution of Cloud Operating System: From Technology to Ecosystem
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Performance Analysis of Various Sorting Algorithms: Comparison and Optimization
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Methods for Accelerating the Search for the Optimal Distribution of Parallel Processes in Heterogeneous Systems
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Function/Kernel Vectorization via Loop Vectorizer
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Optimization Problem for Heterogeneous Computing Systems
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Exploiting Pure Superword Level Parallelism for Array Indirections
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Throttling Automatic Vectorization: When Less is More
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Dynamic compilation of data-parallel kernels for vector processors
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A compiler framework for extracting superword level parallelism
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Efficient SIMD code generation for irregular kernels
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Hybrid type legalization for a sparse SIMD instruction set
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Performance search engine driven by prior knowledge of optimization
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Automatic Vectorization of Interleaved Data Revisited
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An evaluation of current SIMD programming models for C++
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A Compiler Approach for Exploiting Partial SIMD Parallelism
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Automated compiler optimization of multiple vector loads/stores
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Vectorization in PyPy's Tracing Just-In-Time Compiler
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Loop-oriented array- and field-sensitive pointer analysis for automatic SIMD vectorization
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FlexVec: auto-vectorization for irregular loops
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Loop-oriented array- and field-sensitive pointer analysis for automatic SIMD vectorization
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FlexVec: auto-vectorization for irregular loops
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Improving the effectiveness of searching for isomorphic chains in superword level parallelism
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Loop-Oriented Pointer Analysis for Automatic SIMD Vectorization
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goSLP: globally optimized superword level parallelism framework
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SIMD-aware word length optimization for floating-point to fixed-point conversion targeting embedded processors
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