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https://doi.org/10.1145/3366634
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-642-24797-2openalex-snapshot
Supervised Sequence Labelling with Recurrent Neural Networks
inferredcites →https://doi.org/10.1109/12.67316openalex-snapshot
Expanding the range of convergence of the CORDIC algorithm
inferredcites →https://doi.org/10.1109/aspdac.2017.7858394openalex-snapshot
FPGA-based accelerator for long short-term memory recurrent neural networks
inferredcites →https://doi.org/10.1109/cicc.2018.8357068openalex-snapshot
Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference
inferredcites →https://doi.org/10.1109/fccm.2015.50openalex-snapshot
FPGA Acceleration of Recurrent Neural Network Based Language Model
inferredcites →https://doi.org/10.1109/fccm.2017.25openalex-snapshot
FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates
inferredcites →https://doi.org/10.1109/fpl.2016.7577314openalex-snapshot
Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC
inferredcites →https://doi.org/10.1109/fpl.2018.00024openalex-snapshot
FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs
inferredcites →https://doi.org/10.1109/icassp.2015.7178129openalex-snapshot
Single stream parallelization of generalized LSTM-like RNNs on a GPU
inferredcites →https://doi.org/10.1109/isca.2018.00012openalex-snapshot
A Configurable Cloud-Scale DNN Processor for Real-Time AI
inferredcites →https://doi.org/10.1109/iscas.2017.8050816openalex-snapshot
Hardware accelerators for recurrent neural networks on FPGA
inferredcites →https://doi.org/10.1109/isscc.2017.7870350openalex-snapshot
14.2 DNPU: An 8.1TOPS/W reconfigurable CNN-RNN processor for general-purpose deep neural networks
inferredcites →https://doi.org/10.1109/micro.2016.7783722openalex-snapshot
Stripes: Bit-serial deep neural network computing
inferredcites →https://doi.org/10.1109/reconfig.2016.7857151openalex-snapshot
An FPGA implementation of a long short-term memory neural network
inferredcites →https://doi.org/10.1109/sips.2016.48openalex-snapshot
FPGA-Based Low-Power Speech Recognition with Recurrent Neural Networks
inferredcites →https://doi.org/10.1109/taslp.2015.2400218openalex-snapshot
From Feedforward to Recurrent LSTM Neural Networks for Language Modeling
inferredcites →https://doi.org/10.1109/tvlsi.2017.2717950openalex-snapshot
Accelerating Recurrent Neural Networks: A Memory-Efficient Approach
inferredcites →https://doi.org/10.1145/3020078.3021745openalex-snapshot
ESE
inferredcites →https://doi.org/10.1145/3061639.3062290openalex-snapshot
A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks
inferredcites →https://doi.org/10.1145/3123939.3123982openalex-snapshot
Bit-pragmatic deep neural network computing
inferredcites →https://doi.org/10.1145/3174243.3174253openalex-snapshot
C-LSTM
inferredcites →https://doi.org/10.1145/3289602.3293898openalex-snapshot
Efficient and Effective Sparse LSTM on FPGA with Bank-Balanced Sparsity
inferredcites →https://doi.org/10.1145/800015openalex-snapshot
Proceedings of the 11th annual international symposium on Computer architecture - ISCA '84
inferredcites →https://doi.org/10.1162/neco.1997.9.8.1735openalex-snapshot
Long Short-Term Memory
inferredcites →https://doi.org/10.23919/date.2017.7927210openalex-snapshot
Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition
inferredcites →https://doi.org/10.3115/v1/w14-4012openalex-snapshot
On the Properties of Neural Machine Translation: Encoder–Decoder Approaches
inferredcites →https://doi.org/10.5860/choice.35-2759openalex-snapshot
Elementary functions: algorithms and implementation

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1016/j.neucom.2023.126230openalex-snapshot
A high-efficiency spaceborne processor for hybrid neural networks
inferred← citeshttps://doi.org/10.1016/j.sysarc.2020.101839openalex-snapshot
A survey On hardware accelerators and optimization techniques for RNNs
inferred← citeshttps://doi.org/10.1051/e3sconf/202341201069openalex-snapshot
Optimizing LSTM Models for EUR/USD Prediction in the context of reducing energy consumption: An Analysis of Mean Squared Error, Mean Absolute Error and R-Squared
inferred← citeshttps://doi.org/10.1063/5.0341938openalex-snapshot
VLSI design of stochastic sequence based approximate multiplier design with LFSR
inferred← citeshttps://doi.org/10.1109/iccad66269.2025.11240819openalex-snapshot
Coflex: Enhancing HW-NAS with Sparse Gaussian Processes for Efficient and Scalable DNN Accelerator Design
inferred← citeshttps://doi.org/10.1109/icesc65114.2025.11212248openalex-snapshot
Stochastic Bitstream Generation using LFSRs for Low-Complexity Multiplier Design
inferred← citeshttps://doi.org/10.1109/ieacon57683.2023.10370258openalex-snapshot
A Power and Area Efficient Approximate Matrix Vector Multiplier using Stochastic Computing
inferred← citeshttps://doi.org/10.1109/iscas48785.2022.9937633openalex-snapshot
A High-performance RNS LSTM block
inferred← citeshttps://doi.org/10.1109/iscas56072.2025.11044026openalex-snapshot
SSMA: A Memory-Efficient Accelerator for State Space Model in the Mamba
inferred← citeshttps://doi.org/10.1109/isqed69900.2026.11534714openalex-snapshot
Cross-Layer Co-Optimized LSTM Accelerator for Real-Time Gait Analysis
inferred← citeshttps://doi.org/10.1109/isvlsi54635.2022.00030openalex-snapshot
RecLight: A Recurrent Neural Network Accelerator with Integrated Silicon Photonics
inferred← citeshttps://doi.org/10.1109/lascas67804.2026.11457131openalex-snapshot
Power-Efficient LSTM Design Using Approximate Computing
inferred← citeshttps://doi.org/10.1109/lca.2024.3379002openalex-snapshot
Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI
inferred← citeshttps://doi.org/10.1109/tcsi.2021.3099716openalex-snapshot
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference
inferred← citeshttps://doi.org/10.1109/tcsi.2022.3217091openalex-snapshot
Architectural Trade-Off Analysis for Accelerating LSTM Network Using Radix-r OBC Scheme
inferred← citeshttps://doi.org/10.1109/tnnls.2024.3425569openalex-snapshot
Digit-Serial DA-Based Fixed-Point RNNs: A Unified Approach for Enhancing Architectural Efficiency
inferred← citeshttps://doi.org/10.1109/vlsi-soc53125.2021.9606971openalex-snapshot
Efficient Implementation of Activation Functions for LSTM accelerators
inferred← citeshttps://doi.org/10.1145/3543069openalex-snapshot
Streaming Overlay Architecture for Lightweight LSTM Computation on FPGA SoCs
inferred← citeshttps://doi.org/10.1145/3699512openalex-snapshot
Real-time Blood Pressure Prediction on Wearables with Edge-Based DNNs: A Co-Design Approach
inferred← citeshttps://doi.org/10.23919/date51398.2021.9474193openalex-snapshot
Speeding up MUX-FSM based Stochastic Computing for On-device Neural Networks
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774683openalex-snapshot
SACC: Split and Combine Approach to Reduce the Off-chip Memory Accesses of LSTM Accelerators
inferred← citeshttps://doi.org/10.3390/app13074144openalex-snapshot
FPGA Implementation of a Deep Learning Acceleration Core Architecture for Image Target Detection
inferred← citeshttps://doi.org/10.3390/electronics10080882openalex-snapshot
PermLSTM: A High Energy-Efficiency LSTM Accelerator Architecture
inferred← citeshttps://doi.org/10.3390/s22041421openalex-snapshot
Survey on Optimization Methods for LEO-Satellite-Based Networks with Applications in Future Autonomous Transportation
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