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Proceedings of the 11th annual international symposium on Computer architecture - ISCA '84

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DarkCache
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Write-rationing garbage collection for hybrid memories
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In Hardware We Trust
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Comprehensive Characterization of an Open Source Document Search Engine
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Thread Batching for High-performance Energy-efficient GPU Memory Design
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LFOC
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FPGA-Accelerated Optimistic Concurrency Control for Transactional Memory
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SparTen
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The Ideal Versus the Real
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ELSA
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ShiftsReduce
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Elastic Cuckoo Page Tables
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Hurdle: Securing Jump Instructions Against Code Reuse Attacks
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Dynamic row activation mechanism for multi-core systems
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Hardware-supported remote persistence for distributed persistent memory
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Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache
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Formal Verification of a Multiprocessor Hypervisor on Arm Relaxed Memory Hardware
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Sparse-T
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Value-based clock gating and operation packing
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Chronos vs. Chaos
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An Associativity Threshold Phenomenon in Set-Associative Caches
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Pond: CXL-Based Memory Pooling Systems for Cloud Platforms
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Roar: A Router Microarchitecture for In-network Allreduce
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Mosaic Pages: Big TLB Reach with Small Pages
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PipeSynth: Automated Synthesis of Microarchitectural Axioms for Memory Consistency
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Catamaran: Low-Overhead Memory Safety Enforcement via Parallel Acceleration
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FIFO queues are all you need for cache eviction
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Enabling In-Vitro Serverless Systems Research
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An Electro-Photonic System for Accelerating Deep Neural Networks
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QuCT: A Framework for Analyzing Quantum Circuit by Extracting Contextual and Topological Features
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McCore: A Holistic Management of High-Performance Heterogeneous Multicores
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Affinity Alloc: Taming Not-So Near-Data Computing
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Micro-Armed Bandit: Lightweight & Reusable Reinforcement Learning for Microarchitecture Decision-Making
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Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimization
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Divergence Reduction in Monte Carlo Neutron Transport with On-GPU Asynchronous Scheduling
inferred← citeshttps://doi.org/10.1145/3641853openalex-snapshot
Tyche: An Efficient and General Prefetcher for Indirect Memory Accesses
inferred← citeshttps://doi.org/10.1145/3643813openalex-snapshot
Flow-Time Minimization for Timely Data Stream Processing in UAV-Aided Mobile Edge Computing
inferred← citeshttps://doi.org/10.1145/3659208openalex-snapshot
ReHarvest: An ADC Resource-Harvesting Crossbar Architecture for ReRAM-Based DNN Accelerators
inferred← citeshttps://doi.org/10.11606/t.55.2016.tde-28072016-140437openalex-snapshot
Metodologia de benchmark para avaliação de desempenho não-estacionária: um estudo de caso baseado em aplicações de computação em nuvem
inferred← citeshttps://doi.org/10.1177/0037549704044326openalex-snapshot
Speeding Up Architectural Simulations for High-Performance Processors
inferred← citeshttps://doi.org/10.1186/s13677-022-00307-4openalex-snapshot
Congestion aware low power on chip protocols with network on chip with cloud security
inferred← citeshttps://doi.org/10.3389/fgene.2021.615958openalex-snapshot
Enabling Genomics Pipelines in Commodity Personal Computers With Flash Storage
inferred← citeshttps://doi.org/10.37099/mtu.dc.etdr/1394openalex-snapshot
Eager Scheduling of Dependent Instructions
inferred← citeshttps://doi.org/10.37099/mtu.dc.etdr/589openalex-snapshot
Mitigating the Effect of Misspeculations in Superscalar Processors
inferred← citeshttps://doi.org/10.4108/eai.25-1-2019.159346openalex-snapshot
Adaptive Noise Injection against Side-Channel Attacks on ARM Platform
inferred← citeshttps://doi.org/10.5821/dissertation-2117-95048openalex-snapshot
Application of clustering analysis and sequence analysis on the performance analysis of parallel applications
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