On the public citation graph

A Metric-Guided Method for Discovering Impactful Features and Architectural Insights for Skylake-Based Processors

https://doi.org/10.1145/3369383
0 signed · 41 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/(sici)1097-024x(199903)29:3<219::aid-spe230>3.0.co;2-0openalex-snapshot
Differential profiling
inferredcites →https://doi.org/10.1109/hcs36694.2015openalex-snapshot
2015 IEEE Hot Chips 27 Symposium (HCS)
inferredcites →https://doi.org/10.1109/hotchips.2016.7936224openalex-snapshot
A new ×86 core architecture for the next generation of computing
inferredcites →https://doi.org/10.1109/hpca51647.2021openalex-snapshot
2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
inferredcites →https://doi.org/10.1109/iiswc55918.2022openalex-snapshot
2022 IEEE International Symposium on Workload Characterization (IISWC)
inferredcites →https://doi.org/10.1109/isca32457.2014openalex-snapshot
2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)
inferredcites →https://doi.org/10.1109/ispass.2014.6844459openalex-snapshot
A Top-Down method for performance analysis and counters architecture
inferredcites →https://doi.org/10.1109/ispass.2015.7095782openalex-snapshot
Micro-architecture independent analytical processor performance and power modeling
inferredcites →https://doi.org/10.1109/ispass61541.2024openalex-snapshot
2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
inferredcites →https://doi.org/10.1109/lca.2019.2916408openalex-snapshot
Tuning Performance via Metrics with Expectations
inferredcites →https://doi.org/10.1109/mc.2015.374openalex-snapshot
Computing beyond Moore's Law
inferredcites →https://doi.org/10.1109/mm.2014.10openalex-snapshot
Haswell: The Fourth-Generation Intel Core Processor
inferredcites →https://doi.org/10.1109/mm.2017.38openalex-snapshot
Inside 6th-Generation Intel Core: New Microarchitecture Code-Named Skylake
inferredcites →https://doi.org/10.1145/1064978.1065034openalex-snapshot
Pin
inferredcites →https://doi.org/10.1145/1272998.1273004openalex-snapshot
Thread clustering
inferredcites →https://doi.org/10.1145/2024716.2024718openalex-snapshot
The gem5 simulator
inferredcites →https://doi.org/10.1145/2379776.2379780openalex-snapshot
Survey of scheduling techniques for addressing shared resources in multicore processors
inferredcites →https://doi.org/10.1145/2465351openalex-snapshot
Proceedings of the 8th ACM European Conference on Computer Systems
inferredcites →https://doi.org/10.1145/2872887.2750392openalex-snapshot
Profiling a warehouse-scale computer
inferredcites →https://doi.org/10.1145/3018112openalex-snapshot
Fine-Grain Power Breakdown of Modern Out-of-Order Cores and Its Implications on Skylake-Based Systems
inferredcites →https://doi.org/10.1145/3210560openalex-snapshot
QuMan
inferredcites →https://doi.org/10.1145/3314577openalex-snapshot
Cross-Modality Retrieval by Joint Correlation Learning
inferredcites →https://doi.org/10.1145/3317689openalex-snapshot
Collaborative Mobile Crowdsensing in Opportunistic D2D Networks
inferredcites →https://doi.org/10.1145/3581784openalex-snapshot
Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cpe.7814openalex-snapshot
Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake
inferred← citeshttps://doi.org/10.1007/978-3-030-95953-1_12openalex-snapshot
Enhancing the Top-Down Microarchitectural Analysis Method Using Purchasing Power Parity Theory
inferred← citeshttps://doi.org/10.1007/s00778-021-00663-8openalex-snapshot
Micro-architectural analysis of in-memory OLTP: Revisited
inferred← citeshttps://doi.org/10.1007/s42979-025-03943-0openalex-snapshot
NeuroProbe: A Performance Profiling Feed Forward Neural Network Simulator for Hardware Interaction Analysis
inferred← citeshttps://doi.org/10.1016/j.jpdc.2025.105091openalex-snapshot
Advanced resource management: A hands-on master course in HPC and cloud computing
inferred← citeshttps://doi.org/10.1109/hpca53966.2022.00089openalex-snapshot
DarkGates: A Hybrid Power-Gating Architecture to Mitigate the Performance Impact of Dark-Silicon in High Performance Processors
inferred← citeshttps://doi.org/10.1109/ipdpsw63119.2024.00135openalex-snapshot
Performance Analysis of the NVIDIA HPC SDK and AMD AOCC Compilers in an HPC Cluster Using Pooled, Robust and Relative Metrics
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00063openalex-snapshot
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications
inferred← citeshttps://doi.org/10.1109/pmbs56514.2022.00011openalex-snapshot
Performance Analysis with Unified Hardware Counter Metrics
inferred← citeshttps://doi.org/10.1145/3466752.3480085openalex-snapshot
BurstLink: Techniques for Energy-Efficient Video Display for Conventional and Virtual Reality Systems
inferred← citeshttps://doi.org/10.1145/3514221.3517826openalex-snapshot
Rethinking Stateful Stream Processing with RDMA
inferred← citeshttps://doi.org/10.1145/3546591.3547532openalex-snapshot
Evaluation of the Intel thread director technology on an Alder Lake processor
inferred← citeshttps://doi.org/10.1145/3629525openalex-snapshot
Efficient Cross-platform Multiplexing of Hardware Performance Counters via Adaptive Grouping
inferred← citeshttps://doi.org/10.1145/3674734openalex-snapshot
Agile C-states: A Core C-state Architecture for Latency Critical Applications Optimizing both Transition and Cold-Start Latency
inferred← citeshttps://doi.org/10.2172/1868198openalex-snapshot
Empirical Performance Analysis of HPC Applications with Portable Hardware Counter Metrics [Thesis]
inferred← citeshttps://doi.org/10.48550/arxiv.2104.05119openalex-snapshot
BurstLink: Techniques for Energy-Efficient Conventional and Virtual Reality Video Display
inferred← citeshttps://doi.org/10.52843/cassyni.gtjvgtopenalex-snapshot
From Top-down Microarchitecture Analysis to Structured Performance Optimizations
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.