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FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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Simple statistical gradient-following algorithms for connectionist reinforcement learning
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When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies
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Computation-oriented fault-tolerance schemes for RRAM computing systems
inferredcites →https://doi.org/10.1109/cisda31401.2013openalex-snapshot
2013 IEEE Symposium on Computational Intelligence for Security and Defense Applications (CISDA)
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Fully convolutional networks for semantic segmentation
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Deep Residual Learning for Image Recognition
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2016 IEEE High Performance Extreme Computing Conference (HPEC)
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16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices
inferredcites →https://doi.org/10.1109/jetcas.2017.2776980openalex-snapshot
Stuck-at Fault Tolerance in RRAM Computing Systems
inferredcites →https://doi.org/10.1109/mm.2005.110openalex-snapshot
Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation
inferredcites →https://doi.org/10.1109/mwscas.2009.5236054openalex-snapshot
The 90 nm Double-DICE storage element to reduce Single-Event upsets
inferredcites →https://doi.org/10.1109/rams.2011.5754515openalex-snapshot
Soft error trends and mitigation techniques in memory devices
inferredcites →https://doi.org/10.1109/tc.2014.12openalex-snapshot
RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme
inferredcites →https://doi.org/10.1109/tc.2014.2375962openalex-snapshot
Farewell State of the Journal Editorial
inferredcites →https://doi.org/10.1109/tcad.2015.2394434openalex-snapshot
Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor Memories
inferredcites →https://doi.org/10.1109/ted.2018.2879788openalex-snapshot
Resistive RAM With Multiple Bits Per Cell: Array-Level Demonstration of 3 Bits Per Cell
inferredcites →https://doi.org/10.1109/tnnls.2018.2844093openalex-snapshot
fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs
inferredcites →https://doi.org/10.1109/tns.2017.2743198openalex-snapshot
Reducing Critical Configuration Bits via Partial TMR for SEU Mitigation in FPGAs
inferredcites →https://doi.org/10.1109/tns.2018.2884460openalex-snapshot
Selective Hardening for Neural Networks in FPGAs
inferredcites →https://doi.org/10.1109/tvlsi.2006.881307openalex-snapshot
2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)
inferredcites →https://doi.org/10.1109/tvlsi.2007.909795openalex-snapshot
Analytical Techniques for Soft Error Rate Modeling and Mitigation of FPGA-Based Designs
inferredcites →https://doi.org/10.1109/vlsid.2013.219openalex-snapshot
Sneak-path Testing of Memristor-based Memories
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Reliable on-chip systems in the nano-era
inferredcites →https://doi.org/10.1145/2847263.2847265openalex-snapshot
Going Deeper with Embedded FPGA Platform for Convolutional Neural Network
inferredcites →https://doi.org/10.1145/3061639.3062248openalex-snapshot
Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems
inferredcites →https://doi.org/10.1145/3061639.3062310openalex-snapshot
Rescuing Memristor-based Neuromorphic Design with High Defects
inferredcites →https://doi.org/10.1145/3173549openalex-snapshot
Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems
inferredcites →https://doi.org/10.1145/3289185openalex-snapshot
[DL] A Survey of FPGA-based Neural Network Inference Accelerators
inferredcites →https://doi.org/10.1145/3316781.3317739openalex-snapshot
A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM
inferredcites →https://doi.org/10.1145/3316781.3317742openalex-snapshot
A Fault-Tolerant Neural Network Architecture
inferredcites →https://doi.org/10.48550/arxiv.1312.6199openalex-snapshot
Intriguing properties of neural networks
inferredcites →https://doi.org/10.48550/arxiv.1705.10823openalex-snapshot
Accelerating Neural Architecture Search using Performance Prediction
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Learning Multiple Layers of Features from Tiny Images
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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inferred← citeshttps://doi.org/10.1109/c358072.2023.10436151openalex-snapshot
Design of an experimental setup for the implementation of CNNs in APSoCs
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ARMOR: Architectural Reliability via Multi-Objective Optimization for Early-Exit Neural Networks
inferred← citeshttps://doi.org/10.1109/icpads60453.2023.00172openalex-snapshot
TOSA: Tolerating Stuck-At-Faults in Edge-based RRAM Inference Accelerators
inferred← citeshttps://doi.org/10.1109/tcad.2023.3266405openalex-snapshot
Statistical Modeling of Soft Error Influence on Neural Networks
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Improving DNN Accuracy on MLC PIM via Non-Ideal PIM Device Fine-Tuning
inferred← citeshttps://doi.org/10.1109/tcad.2025.3610732openalex-snapshot
Toward Exploring Fault-Tolerant Neural Architectures: A Hierarchical Codesign Optimization Framework
inferred← citeshttps://doi.org/10.1109/tnnls.2023.3250437openalex-snapshot
Designing Efficient Bit-Level Sparsity-Tolerant Memristive Networks
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Soft Error Tolerant Convolutional Neural Networks on FPGAs With Ensemble Learning
inferred← citeshttps://doi.org/10.1109/tvlsi.2023.3306894openalex-snapshot
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance
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Soft Error Reliability Analysis of Vision Transformers
inferred← citeshttps://doi.org/10.1109/tvlsi.2024.3384404openalex-snapshot
MRFI: An Open-Source Multiresolution Fault Injection Framework for Neural Network Processing
inferred← citeshttps://doi.org/10.1109/vts52500.2021.9794239openalex-snapshot
Special Session: Fault-Tolerant Deep Learning: A Hierarchical Perspective
inferred← citeshttps://doi.org/10.1145/3581784.3607084openalex-snapshot
Structural Coding: A Low-Cost Scheme to Protect CNNs from Large-Granularity Memory Faults
inferred← citeshttps://doi.org/10.1145/3724420openalex-snapshot
Empowering Edge Intelligence: A Comprehensive Survey on On-Device AI Models
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Optimizing Edge AI: A Comprehensive Survey on Data, Model, and System Strategies
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An Overlay Accelerator of DeepLab CNN for Spacecraft Image Segmentation on FPGA
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