On the public citation graph

DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

https://doi.org/10.1145/3479156
0 signed · 137 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/j.1538-7305.1970.tb01770.xopenalex-snapshot
An Efficient Heuristic Procedure for Partitioning Graphs
inferredcites →https://doi.org/10.1002/pssa.201700875openalex-snapshot
Neuromorphic Computing with Memristor Crossbar
inferredcites →https://doi.org/10.1007/978-1-4613-1389-2_5openalex-snapshot
Loose Interdependence Algorithms
inferredcites →https://doi.org/10.1007/978-3-030-95953-1_10openalex-snapshot
Thermal-Aware Compilation of Spiking Neural Networks to Neuromorphic Hardware
inferredcites →https://doi.org/10.1007/978-3-319-67723-1_13openalex-snapshot
Very Large-Scale Neuromorphic Systems for Biological Signal Processing
inferredcites →https://doi.org/10.1007/s11265-020-01573-8openalex-snapshot
Run-time Mapping of Spiking Neural Networks to Neuromorphic Hardware
inferredcites →https://doi.org/10.1016/j.comnet.2010.05.010openalex-snapshot
The Internet of Things: A survey
inferredcites →https://doi.org/10.1016/j.future.2013.06.016openalex-snapshot
Communication and migration energy aware task mapping for reliable multiprocessor systems
inferredcites →https://doi.org/10.1016/j.jpdc.2013.05.004openalex-snapshot
Maximum-throughput mapping of SDFGs on multi-core SoC platforms
inferredcites →https://doi.org/10.1016/j.neunet.2017.12.015openalex-snapshot
Unsupervised heart-rate estimation in wearables with Liquid states and a probabilistic readout
inferredcites →https://doi.org/10.1016/s0893-6080(97)00011-7openalex-snapshot
Networks of spiking neurons: The third generation of neural network models
inferredcites →https://doi.org/10.1038/s41563-019-0291-xopenalex-snapshot
Memristive crossbar arrays for brain-inspired computing
inferredcites →https://doi.org/10.1080/23746149.2016.1259585openalex-snapshot
Neuromorphic computing using non-volatile memory
inferredcites →https://doi.org/10.1109/acsd.2006.33openalex-snapshot
Throughput Analysis of Synchronous Data Flow Graphs
inferredcites →https://doi.org/10.1109/asap52443.2021.00010openalex-snapshot
Improving Inference Lifetime of Neuromorphic Systems via Intelligent Synapse Mapping
inferredcites →https://doi.org/10.1109/cases.2013.6662505openalex-snapshot
Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems
inferredcites →https://doi.org/10.1109/cvpr.2009.5206848openalex-snapshot
ImageNet: A large-scale hierarchical image database
inferredcites →https://doi.org/10.1109/dac.2007.375269openalex-snapshot
Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs
inferredcites →https://doi.org/10.1109/date.2012.6176588openalex-snapshot
Modeling static-order schedules in synchronous dataflow graphs
inferredcites →https://doi.org/10.1109/edcc51268.2020.00013openalex-snapshot
Improving Dependability of Neuromorphic Computing With Non-Volatile Memory
inferredcites →https://doi.org/10.1109/iccad.2013.6691121openalex-snapshot
SDC-based modulo scheduling for pipeline synthesis
inferredcites →https://doi.org/10.1109/iccad.2017.8203823openalex-snapshot
TraNNsformer: Neural network transformation for memristive crossbar based neuromorphic system design
inferredcites →https://doi.org/10.1109/iccad51958.2021.9643500openalex-snapshot
A Design Flow for Mapping Spiking Neural Networks to Many-Core Neuromorphic Hardware
inferredcites →https://doi.org/10.1109/icpads.2012.82openalex-snapshot
Energy-Aware Communication and Remapping of Tasks for Reliable Multimedia Multiprocessor Systems
inferredcites →https://doi.org/10.1109/igsc51522.2020.9290830openalex-snapshot
Compiling Spiking Neural Networks to Mitigate Neuromorphic Hardware Constraints
inferredcites →https://doi.org/10.1109/igsc51522.2020.9290845openalex-snapshot
Reliability-Performance Trade-offs in Neuromorphic Computing
inferredcites →https://doi.org/10.1109/igsc51522.2020.9291024openalex-snapshot
Design Methodologies for Reliable and Energy-efficient PCM Systems
inferredcites →https://doi.org/10.1109/ijcnn.2013.6707078openalex-snapshot
Cognitive computing programming paradigm: A Corelet Language for composing networks of neurosynaptic cores
inferredcites →https://doi.org/10.1109/ijcnn.2018.8489326openalex-snapshot
CARLsim 4: An Open Source Library for Large Scale, Biologically Detailed Spiking Neural Network Simulation using Heterogeneous Clusters
inferredcites →https://doi.org/10.1109/ijcnn.2018.8489652openalex-snapshot
A Recurrent Neural Network Based Model of Predictive Smooth Pursuit Eye Movement in Primates
inferredcites →https://doi.org/10.1109/ijcnn48605.2020.9207142openalex-snapshot
PyCARL: A PyNN Interface for Hardware-Software Co-Simulation of Spiking Neural Network
inferredcites →https://doi.org/10.1109/ipdpsw.2017.44openalex-snapshot
A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA
inferredcites →https://doi.org/10.1109/isca45697.2020.00045openalex-snapshot
MLPerf Inference Benchmark
inferredcites →https://doi.org/10.1109/iscas.2003.1206342openalex-snapshot
A low-power adaptive integrate-and-fire neuron circuit
inferredcites →https://doi.org/10.1109/iscas.2012.6272131openalex-snapshot
Live demonstration: A scaled-down version of the BrainScaleS wafer-scale neuromorphic system
inferredcites →https://doi.org/10.1109/islped.2015.7273508openalex-snapshot
Hardware-software interaction for run-time power optimization: A case study of embedded Linux on multicore smartphones
inferredcites →https://doi.org/10.1109/isvlsi.2019.00043openalex-snapshot
A Framework for the Analysis of Throughput-Constraints of SNNs on Neuromorphic Hardware
inferredcites →https://doi.org/10.1109/jproc.2014.2304638openalex-snapshot
The SpiNNaker Project
inferredcites →https://doi.org/10.1109/jproc.2014.2313565openalex-snapshot
Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations
inferredcites →https://doi.org/10.1109/jssc.2016.2616357openalex-snapshot
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
inferredcites →https://doi.org/10.1109/lca.2019.2951507openalex-snapshot
A Framework to Explore Workload-Specific Performance and Lifetime Trade-offs in Neuromorphic Computing
inferredcites →https://doi.org/10.1109/les.2020.3025873openalex-snapshot
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition
inferredcites →https://doi.org/10.1109/mc.2019.2903009openalex-snapshot
TrueNorth: Accelerating From Zero to 64 Million Neurons in 10 Years
inferredcites →https://doi.org/10.1109/micro.2016.7783724openalex-snapshot
NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints
inferredcites →https://doi.org/10.1109/mm.2017.54openalex-snapshot
Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators
inferredcites →https://doi.org/10.1109/mm.2018.112130359openalex-snapshot
Loihi: A Neuromorphic Manycore Processor with On-Chip Learning
inferredcites →https://doi.org/10.1109/msp.2012.2211477openalex-snapshot
The MNIST Database of Handwritten Digit Images for Machine Learning Research [Best of the Web]
inferredcites →https://doi.org/10.1109/mwscas48704.2020.9184557openalex-snapshot
A Case for Lifetime Reliability-Aware Neuromorphic Computing
inferredcites →https://doi.org/10.1109/proc.1987.13876openalex-snapshot
Synchronous data flow
inferredcites →https://doi.org/10.1109/recosoc.2013.6581540openalex-snapshot
Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs
inferredcites →https://doi.org/10.1109/rsp.2012.6380704openalex-snapshot
Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs
inferredcites →https://doi.org/10.1109/rtas.2012.15openalex-snapshot
Static Rate-Optimal Scheduling of Multirate DSP Algorithms via Retiming and Unfolding
inferredcites →https://doi.org/10.1109/sips.2018.8598419openalex-snapshot
Neuromorphic Computing Across the Stack: Devices, Circuits and Architectures
inferredcites →https://doi.org/10.1109/spmb50085.2020.9353634openalex-snapshot
Machine Learning Applications to DNA Subsequence and Restriction Site Analysis
inferredcites →https://doi.org/10.1109/tbcas.2017.2759700openalex-snapshot
A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)
inferredcites →https://doi.org/10.1109/tetci.2018.2829924openalex-snapshot
An All-Memristor Deep Spiking Neural Computing System: A Step Toward Realizing the Low-Power Stochastic Brain
inferredcites →https://doi.org/10.1109/tpds.2015.2412137openalex-snapshot
Reliability and Energy-Aware Mapping and Scheduling of Multimedia Applications on Multiprocessor Systems
inferredcites →https://doi.org/10.1109/tpds.2021.3065591openalex-snapshot
Endurance-Aware Mapping of Spiking Neural Networks to Neuromorphic Hardware
inferredcites →https://doi.org/10.1109/tvlsi.2019.2951493openalex-snapshot
Mapping Spiking Neural Networks to Neuromorphic Hardware
inferredcites →https://doi.org/10.1109/vts50974.2021.9441050openalex-snapshot
Special Session: Reliability Analysis for AI/ML Hardware
inferredcites →https://doi.org/10.1145/1146909.1147025openalex-snapshot
An efficient and versatile scheduling algorithm based on SDC formulation
inferredcites →https://doi.org/10.1145/1146909.1147138openalex-snapshot
Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs
inferredcites →https://doi.org/10.1145/1278480.1278674openalex-snapshot
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
inferredcites →https://doi.org/10.1145/2544375.2544392openalex-snapshot
Energy-aware task mapping and scheduling for reliable embedded computing systems
inferredcites →https://doi.org/10.1145/2627369.2627625openalex-snapshot
SPINDLE
inferredcites →https://doi.org/10.1145/2701310.2701311openalex-snapshot
Adaptive Energy Minimization of OpenMP Parallel Applications on Many-Core Systems
inferredcites →https://doi.org/10.1145/2744769.2744795openalex-snapshot
An EDA framework for large scale hybrid neuromorphic computing systems
inferredcites →https://doi.org/10.1145/2834120openalex-snapshot
Adaptive and Hierarchical Runtime Manager for Energy-Aware Thermal Management of Embedded Systems
inferredcites →https://doi.org/10.1145/2897937.2898010openalex-snapshot
Dot-product engine for neuromorphic computing
inferredcites →https://doi.org/10.1145/3061639.3062260openalex-snapshot
Hierarchical Dataflow Modeling of Iterative Applications
inferredcites →https://doi.org/10.1145/3065386openalex-snapshot
ImageNet classification with deep convolutional neural networks
inferredcites →https://doi.org/10.1145/3194554.3194627openalex-snapshot
Dataflow-Based Mapping of Spiking Neural Networks on Neuromorphic Hardware
inferredcites →https://doi.org/10.1145/3278576.3278598openalex-snapshot
Heartbeat classification in wearables using multi-layer perceptron and time-frequency joint distribution of ECG
inferredcites →https://doi.org/10.1145/3291054openalex-snapshot
A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips
inferredcites →https://doi.org/10.1145/3299874.3319490openalex-snapshot
Design Methodology for Embedded Approximate Artificial Neural Networks
inferredcites →https://doi.org/10.1145/3299874.3319491openalex-snapshot
Exploration of Segmented Bus As Scalable Global Interconnect for Neuromorphic Computing
inferredcites →https://doi.org/10.1145/3358180openalex-snapshot
Enabling and Exploiting Partition-Level Parallelism (PALP) in Phase Change Memories
inferredcites →https://doi.org/10.1145/3372799.3394364openalex-snapshot
Compiling Spiking Neural Networks to Neuromorphic Hardware
inferredcites →https://doi.org/10.1145/3381898.3397210openalex-snapshot
Improving phase change memory performance with data content aware access
inferredcites →https://doi.org/10.1145/3381898.3397215openalex-snapshot
Exploiting inter- and intra-memory asymmetries for data mapping in hybrid tiered-memories
inferredcites →https://doi.org/10.1145/3394885.3431529openalex-snapshot
Aging-Aware Request Scheduling for Non-Volatile Main Memory
inferredcites →https://doi.org/10.1145/3457388.3458664openalex-snapshot
On the role of system software in energy management of neuromorphic computing
inferredcites →https://doi.org/10.1145/3462330openalex-snapshot
Dynamic Reliability Management in Neuromorphic Computing
inferredcites →https://doi.org/10.1145/3477145.3477156openalex-snapshot
NeuroXplorer 1.0: An Extensible Framework for Architectural Exploration with Spiking Neural Networks
inferredcites →https://doi.org/10.1155/2007/83710openalex-snapshot
Self-Timed Scheduling Analysis for Real-Time Applications
inferredcites →https://doi.org/10.1162/neco.1997.9.6.1179openalex-snapshot
The NEURON Simulation Environment
inferredcites →https://doi.org/10.1166/jolpe.2018.1582openalex-snapshot
Power-Accuracy Trade-Offs for Heartbeat Classification on Neural Networks Hardware
inferredcites →https://doi.org/10.23919/date.2018.8342201openalex-snapshot
Mapping of local and global synapses on spiking neuromorphic hardware
inferredcites →https://doi.org/10.23919/vlsit.2017.7998166openalex-snapshot
Design-technology co-optimization for OxRRAM-based synaptic processing unit
inferredcites →https://doi.org/10.3389/conf.neuro.11.2008.01.046openalex-snapshot
PyNN: a common interface for neuronal network simulators
inferredcites →https://doi.org/10.3389/fncom.2015.00099openalex-snapshot
Unsupervised learning of digit recognition using spike-timing-dependent plasticity
inferredcites →https://doi.org/10.3389/fninf.2013.00048openalex-snapshot
Nengo: a Python tool for building large-scale functional brain models
inferredcites →https://doi.org/10.3389/fnins.2014.00429openalex-snapshot
A framework for plasticity implementation on the SpiNNaker neural architecture
inferredcites →https://doi.org/10.3389/fnins.2020.00907openalex-snapshot
HFNet: A CNN Architecture Co-designed for Neuromorphic Hardware With a Crossbar Array of Synapses
inferredcites →https://doi.org/10.3389/neuro.01.026.2009openalex-snapshot
The Brian simulator
inferredcites →https://doi.org/10.3389/neuro.11.011.2008openalex-snapshot
PyNN: a common interface for neuronal network simulators
inferredcites →https://doi.org/10.3389/neuro.11.012.2008openalex-snapshot
PyNEST: A convenient interface to the NEST simulator
inferredcites →https://doi.org/10.48550/arxiv.1409.1556openalex-snapshot
Very Deep Convolutional Networks for Large-Scale Image Recognition
inferredcites →https://doi.org/10.48550/arxiv.1605.08695openalex-snapshot
TensorFlow: A system for large-scale machine learning
inferredcites →https://doi.org/10.48550/arxiv.1612.04052openalex-snapshot
Theory and Tools for the Conversion of Analog to Spiking Convolutional Neural Networks
inferredcites →https://doi.org/10.48550/arxiv.1912.01703openalex-snapshot
PyTorch: An Imperative Style, High-Performance Deep Learning Library
inferredcites →https://doi.org/10.5555/3195638.3195663openalex-snapshot
NEUTRAMS: neural network transformation and co-design under neuromorphic hardware constraints
inferredcites →https://doi.org/10.7873/date.2013.331openalex-snapshot
Communication and Migration Energy Aware Design Space Exploration for Multicore Systems with Intermittent Faults

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.2139/ssrn.4849071openalex-extracted
Ravsim 2.0: An Open-Source Simulator for Machine Learning
inferred← citeshttps://doi.org/10.1016/j.neucom.2026.134302openalex-snapshot
StaDyn: A static-dynamic integrated evaluation framework for rapid SNN mapping
inferred← citeshttps://doi.org/10.1016/j.softx.2024.102006openalex-snapshot
RAVSim v2.0: Enhanced visualization and comparative analysis for neural network models
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103553openalex-snapshot
Hardware/Software Co-design for spike communication optimization: Leveraging neuron-level communication patterns
inferred← citeshttps://doi.org/10.1109/cmss69636.2026.11689326openalex-snapshot
Energy-Efficient Multirate Signal Processing Using Hybrid Bio-Inspired Optimization for Edge Intelligence Applications
inferred← citeshttps://doi.org/10.1109/compsac57700.2023.00094openalex-snapshot
Preserving Privacy of Neuromorphic Hardware From PCIe Congestion Side-Channel Attack
inferred← citeshttps://doi.org/10.1109/dsd57027.2022.00065openalex-snapshot
DNAsim: Evaluation Framework for Digital Neuromorphic Architectures
inferred← citeshttps://doi.org/10.1109/ets56758.2023.10173860openalex-snapshot
Online Performance Monitoring of Neuromorphic Computing Systems
inferred← citeshttps://doi.org/10.1109/iccad51958.2021.9643500openalex-snapshot
A Design Flow for Mapping Spiking Neural Networks to Many-Core Neuromorphic Hardware
inferred← citeshttps://doi.org/10.1109/icdcs63083.2025.00035openalex-snapshot
Efficient Joint Communication and Computation Placement for Large-scale SNN Simulation on Supercomputers
inferred← citeshttps://doi.org/10.1109/igsc54211.2021.9651556openalex-snapshot
Design Technology Co-Optimization for Neuromorphic Computing
inferred← citeshttps://doi.org/10.1109/ijcnn55064.2022.9892014openalex-snapshot
Learning in Feedback-driven Recurrent Spiking Neural Networks using full-FORCE Training
inferred← citeshttps://doi.org/10.1109/ijcnn64981.2025.11227766openalex-snapshot
SENMap: Multi-objective dataflow mapping & synthesis for hybrid scalable neuromorphic systems
inferred← citeshttps://doi.org/10.1109/iscas58744.2024.10558055openalex-snapshot
SPRCPl: An Efficient Tool for SNN Models Deployment on Multi-Core Neuromorphic Chips via Pilot Running
inferred← citeshttps://doi.org/10.1109/memocode57689.2022.9954596openalex-snapshot
Real-Time Scheduling of Machine Learning Operations on Heterogeneous Neuromorphic SoC
inferred← citeshttps://doi.org/10.1109/mis.2025.3636128openalex-snapshot
SNNL: A Programming Language for Spiking Neural Network Development
inferred← citeshttps://doi.org/10.1109/prdc63035.2024.00014openalex-snapshot
Efficient Built-In Self-Test Strategy for Neuromorphic Hardware Based On Alarm Placement
inferred← citeshttps://doi.org/10.1109/prdc63035.2024.00015openalex-snapshot
Model-Based Approach Towards Correctness Checking of Neuromorphic Computing Systems
inferred← citeshttps://doi.org/10.1109/tcad.2023.3344070openalex-snapshot
Hierarchical Mapping of Large-Scale Spiking Convolutional Neural Networks Onto Resource-Constrained Neuromorphic Processor
inferred← citeshttps://doi.org/10.1109/tcad.2025.3648616openalex-snapshot
SNNcut: An Efficient Partitioning Method for Large-Scale Spiking Neural Networks Using Spike-Sharing
inferred← citeshttps://doi.org/10.1109/tetc.2023.3238708openalex-snapshot
NeuSB: A Scalable Interconnect Architecture for Spiking Neuromorphic Hardware
inferred← citeshttps://doi.org/10.1109/tetci.2024.3379165openalex-snapshot
Network Group Partition and Core Placement Optimization for Neuromorphic Multi-Core and Multi-Chip Systems
inferred← citeshttps://doi.org/10.1109/tpds.2025.3601993openalex-snapshot
Mapping Large-Scale Spiking Neural Network on Arbitrary Meshed Neuromorphic Hardware
inferred← citeshttps://doi.org/10.1145/3524068openalex-snapshot
Design-Technology Co-Optimization for NVM-Based Neuromorphic Processing Elements
inferred← citeshttps://doi.org/10.1145/3528416.3530232openalex-snapshot
A design methodology for fault-tolerant computing using astrocyte neural networks
inferred← citeshttps://doi.org/10.1145/3582016.3582038openalex-snapshot
Mapping Very Large Scale Spiking Neuron Network to Neuromorphic Hardware
inferred← citeshttps://doi.org/10.1145/3589737.3605983openalex-snapshot
Efficient GCN Deployment with Spiking Property on Spatial-Temporal Neuromorphic Chips
inferred← citeshttps://doi.org/10.1145/3635032openalex-snapshot
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip
inferred← citeshttps://doi.org/10.1145/3649153.3649199openalex-snapshot
Clustering and Allocation of Spiking Neural Networks on Crossbar-Based Neuromorphic Architecture
inferred← citeshttps://doi.org/10.1145/3716368.3735294openalex-snapshot
Benchmarking Spiking Network Partitioning Methods on Loihi 2
inferred← citeshttps://doi.org/10.1145/3841639openalex-snapshot
NeuroComp: A Cross-Platform Compiler for Efficient SNN Deployment on Neuromorphic Hardware
inferred← citeshttps://doi.org/10.23919/date54114.2022.9774613openalex-snapshot
Design of Many-Core Big Little µBrains for Energy-Efficient Embedded Neuromorphic Computing
inferred← citeshttps://doi.org/10.3389/fnins.2023.1149410openalex-snapshot
A survey and perspective on neuromorphic continual learning systems
inferred← citeshttps://doi.org/10.3390/s23146548openalex-snapshot
EdgeMap: An Optimized Mapping Toolchain for Spiking Neural Network in Edge Computing
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.