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Auto-tuning Fixed-point Precision with TVM on RISC-V Packed SIMD Extension

https://doi.org/10.1145/3569939
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1002/cpe.1845openalex-snapshot
Compiler supports for VLIW DSP processors with SIMD intrinsics
inferredcites →https://doi.org/10.1007/s13244-018-0639-9openalex-snapshot
Convolutional neural networks: an overview and application in radiology
inferredcites →https://doi.org/10.1016/j.sysarc.2020.101783openalex-snapshot
Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions
inferredcites →https://doi.org/10.1109/5.726791openalex-snapshot
Gradient-based learning applied to document recognition
inferredcites →https://doi.org/10.1109/cgo10303.2005openalex-snapshot
International Symposium on Code Generation and Optimization
inferredcites →https://doi.org/10.1109/cvpr.2009.5206848openalex-snapshot
ImageNet: A large-scale hierarchical image database
inferredcites →https://doi.org/10.1109/cvpr.2016.90openalex-snapshot
Deep Residual Learning for Image Recognition
inferredcites →https://doi.org/10.1109/cvpr14067.2009openalex-snapshot
2009 IEEE Conference on Computer Vision and Pattern Recognition
inferredcites →https://doi.org/10.1109/isscc.2014.6757323openalex-snapshot
1.1 Computing's energy problem (and what we can do about it)
inferredcites →https://doi.org/10.1109/jssc.2019.2950459openalex-snapshot
2020 International Symposium on VLSI Design, Automation, and Test (2020 VLSI-DAT)
inferredcites →https://doi.org/10.1109/sc18731.2012openalex-snapshot
2012 International Conference for High Performance Computing, Networking, Storage and Analysis
inferredcites →https://doi.org/10.1145/2668119openalex-snapshot
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs
inferredcites →https://doi.org/10.1145/3065386openalex-snapshot
ImageNet classification with deep convolutional neural networks
inferredcites →https://doi.org/10.1145/3133218openalex-snapshot
Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files
inferredcites →https://doi.org/10.1159/000505021openalex-snapshot
Machine Learning in Fetal Cardiology: What to Expect
inferredcites →https://doi.org/10.48550/arxiv.1409.1556openalex-snapshot
Very Deep Convolutional Networks for Large-Scale Image Recognition
inferredcites →https://doi.org/10.48550/arxiv.1512.01274openalex-snapshot
MXNet: A Flexible and Efficient Machine Learning Library for Heterogeneous Distributed Systems
inferredcites →https://doi.org/10.48550/arxiv.1602.07360openalex-snapshot
SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5MB model size
inferredcites →https://doi.org/10.48550/arxiv.1603.01025openalex-snapshot
Convolutional Neural Networks using Logarithmic Data Representation
inferredcites →https://doi.org/10.48550/arxiv.1704.04861openalex-snapshot
MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applications
inferredcites →https://doi.org/10.48550/arxiv.1912.01703openalex-snapshot
PyTorch: An Imperative Style, High-Performance Deep Learning Library
inferredcites →https://doi.org/10.5555/3122009.3242044openalex-snapshot
Quantized neural networks

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-031-78459-0_24openalex-snapshot
Benchmarking Deep Learning Inference on RISC-V CPUs
inferred← citeshttps://doi.org/10.1007/978-3-031-87769-8_17openalex-snapshot
Automated Framework for Deep Learning Model Deployment on Edge Devices with Hardware Accelerator
inferred← citeshttps://doi.org/10.1007/978-3-032-22193-3_27openalex-snapshot
Accelerating TVM LLM Inference via Paged KV-Cache and Customized Kernels on RVV
inferred← citeshttps://doi.org/10.1007/s11227-024-06530-xopenalex-snapshot
Optimizing computer vision algorithms with TVM on VLIW architecture based on RVV
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103359openalex-snapshot
GTA: Generating high-performance tensorized program with dual-task scheduling
inferred← citeshttps://doi.org/10.1080/09540091.2023.2272586openalex-snapshot
Accelerating AI performance with the incorporation of TVM and MediaTek NeuroPilot
inferred← citeshttps://doi.org/10.1109/access.2026.3671659openalex-snapshot
P-Box: A RISC-V Packed-SIMD Approach of Accelerating Edge Workloads on Scalar Embedded Cores
inferred← citeshttps://doi.org/10.1109/cac59555.2023.10450767openalex-snapshot
Hardware-Aware Quantization and Performance Evaluation for Tensor Accelerator VTA
inferred← citeshttps://doi.org/10.1109/dspa69176.2026.11476726openalex-snapshot
Application of Risc-V P-Extension for Fixed-Point Digital Signal Processing in Embedded Measurement Systems
inferred← citeshttps://doi.org/10.1109/iitcee67948.2026.11394668openalex-snapshot
Design and Analysis of SIMD Functional Units for RISC-V P-Extension Instructions
inferred← citeshttps://doi.org/10.1109/raics61201.2024.10689726openalex-snapshot
Efficient Adder Designs for Realizing Addition Subset of RISC-V P-SIMD Instructions
inferred← citeshttps://doi.org/10.1109/sc41406.2024.00027openalex-snapshot
autoGEMM: Pushing the Limits of Irregular Matrix Multiplication on Arm Architectures
inferred← citeshttps://doi.org/10.1142/s0218001425510061openalex-snapshot
Optimizing AutoTVM by Parallel Genetic Algorithms
inferred← citeshttps://doi.org/10.1145/3609387openalex-snapshot
Overflow-free Compute Memories for Edge AI Acceleration
inferred← citeshttps://doi.org/10.1145/3664923openalex-snapshot
Fixed-point Encoding and Architecture Exploration for Residue Number Systems
inferred← citeshttps://doi.org/10.1145/3677333.3678149openalex-snapshot
Support Post Quantum Cryptography with SIMD Everywhere on RISC-V Architectures
inferred← citeshttps://doi.org/10.1145/3677333.3678151openalex-snapshot
Rewriting and Optimizing Vector Length Agnostic Intrinsics from Arm SVE to RVV
inferred← citeshttps://doi.org/10.1145/3742873.3755990openalex-snapshot
Extending a RISC-V Core with Sub-FP8 Support for Machine Learning
inferred← citeshttps://doi.org/10.1145/3750720.3757284openalex-snapshot
Hardware-aware Graph Partition for Mobile Inference Acceleration
inferred← citeshttps://doi.org/10.1145/3757917openalex-snapshot
Catch Non-determinism If You Can: Intermittent Inference of Dynamic Neural Networks
inferred← citeshttps://doi.org/10.1145/3772277openalex-snapshot
Deep Learning on RISC-V Platforms at the Edge: A Perspective on the Hardware and Software Support
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