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Survey on Architectural Attacks: A Unified Classification and Attack Model
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/sec.1406openalex-snapshot
Survey of return-oriented programming defense mechanisms
inferredcites →https://doi.org/10.1007/11605805_1openalex-snapshot
Cache Attacks and Countermeasures: The Case of AES
inferredcites →https://doi.org/10.1007/11894063_16openalex-snapshot
Cache-Collision Timing Attacks Against AES
inferredcites →https://doi.org/10.1007/978-3-319-40667-1_14openalex-snapshot
Flush+Flush: A Fast and Stealthy Cache Attack
inferredcites →https://doi.org/10.1007/978-3-319-62105-0_11openalex-snapshot
KASLR is Dead: Long Live KASLR
inferredcites →https://doi.org/10.1007/978-3-642-36095-4openalex-snapshot
Topics in Cryptology – CT-RSA 2013
inferredcites →https://doi.org/10.1007/s13389-016-0141-6openalex-snapshot
A survey of microarchitectural timing attacks and countermeasures on contemporary hardware
inferredcites →https://doi.org/10.1007/s41635-017-0025-yopenalex-snapshot
A Survey of Side-Channel Attacks on Caches and Countermeasures
inferredcites →https://doi.org/10.1016/j.jcss.2014.02.005openalex-snapshot
A survey of emerging threats in cybersecurity
inferredcites →https://doi.org/10.1016/j.micpro.2016.12.010openalex-snapshot
Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection
inferredcites →https://doi.org/10.1016/j.microrel.2021.114085openalex-snapshot
Verifying cache architecture vulnerabilities using a formal security verification flow
inferredcites →https://doi.org/10.1109/aset.2017.7983658openalex-snapshot
Toward on hardware firewalling of networks-on-chip based systems
inferredcites →https://doi.org/10.1109/ccaa.2016.7813791openalex-snapshot
Analysis of cyber attack vectors
inferredcites →https://doi.org/10.1109/cit/iucc/dasc/picom.2015.259openalex-snapshot
A New Prime and Probe Cache Side-Channel Attack for Cloud Computing
inferredcites →https://doi.org/10.1109/ddecs50862.2020.9095707openalex-snapshot
A Security Verification Template to Assess Cache Architecture Vulnerabilities
inferredcites →https://doi.org/10.1109/dsd.2007.4341520openalex-snapshot
Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations
inferredcites →https://doi.org/10.1109/dsd51259.2020.00043openalex-snapshot
SCAAT: Secure Cache Alternative Address Table for mitigating cache logical side-channel attacks
inferredcites →https://doi.org/10.1109/ets48528.2020.9131603openalex-snapshot
LiD-CAT: A Lightweight Detector for Cache ATtacks
inferredcites →https://doi.org/10.1109/eurospw51379.2020.00102openalex-snapshot
Nethammer: Inducing Rowhammer Faults through Network Requests
inferredcites →https://doi.org/10.1109/ipdps.2016.59openalex-snapshot
Mitigation of Denial of Service Attack with Hardware Trojans in NoC Architectures
inferredcites →https://doi.org/10.1109/iscas.2017.8050256openalex-snapshot
Activation of secure zones in many-core systems with dynamic rerouting
inferredcites →https://doi.org/10.1109/ispass.2001.990684openalex-snapshot
Automatic memory hierarchy characterization
inferredcites →https://doi.org/10.1109/ispass.2010.5452013openalex-snapshot
Demystifying GPU microarchitecture through microbenchmarking
inferredcites →https://doi.org/10.1109/isvlsi.2016.25openalex-snapshot
Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management
inferredcites →https://doi.org/10.1109/isvlsi.2017.57openalex-snapshot
Exploiting Bus Communication to Improve Cache Attacks on Systems-on-Chips
inferredcites →https://doi.org/10.1109/les.2014.2384744openalex-snapshot
NoC-Based Protection for SoC Time-Driven Attacks
inferredcites →https://doi.org/10.1109/micro.2002.1176268openalex-snapshot
Microarchitectural denial of service: insuring microarchitectural fairness
inferredcites →https://doi.org/10.1109/ms.1985.230346openalex-snapshot
Software Engineering Institute
inferredcites →https://doi.org/10.1109/nocs.2012.24openalex-snapshot
Efficient Timing Channel Protection for On-Chip Networks
inferredcites →https://doi.org/10.1109/reconfig.2015.7393301openalex-snapshot
Efficient and flexible NoC-based group communication for secure MPSoCs
inferredcites →https://doi.org/10.1109/rtas.2013.6531080openalex-snapshot
Measurement-based modeling of the cache replacement policy
inferredcites →https://doi.org/10.1109/rtas.2015.7108453openalex-snapshot
Reverse-engineering embedded memory controllers through latency-based analysis
inferredcites →https://doi.org/10.1109/sbcci.2016.7724051openalex-snapshot
Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack
inferredcites →https://doi.org/10.1109/sips.2005.1579858openalex-snapshot
From NoC security analysis to design solutions
inferredcites →https://doi.org/10.1109/sp.2011.22openalex-snapshot
Cache Games -- Bringing Access-Based Cache Attacks on AES to Practice
inferredcites →https://doi.org/10.1109/sp.2015.43openalex-snapshot
Last-Level Cache Side-Channel Attacks are Practical
inferredcites →https://doi.org/10.1109/sp.2015.44openalex-snapshot
On Subnormal Floating Point and Abnormal Timing
inferredcites →https://doi.org/10.1109/sp.2019.00002openalex-snapshot
Spectre Attacks: Exploiting Speculative Execution
inferredcites →https://doi.org/10.1109/sp40001.2021openalex-snapshot
2021 IEEE Symposium on Security and Privacy (SP)
inferredcites →https://doi.org/10.1109/tc.2006.166openalex-snapshot
SmashGuard: A Hardware Solution to Prevent Security Attacks on the Function Return Address
inferredcites →https://doi.org/10.1109/tcad.2015.2448684openalex-snapshot
Security in MPSoCs: A NoC Firewall and an Evaluation Framework
inferredcites →https://doi.org/10.1109/tcad.2021.3063998openalex-snapshot
SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks
inferredcites →https://doi.org/10.1109/tdsc.2006.25openalex-snapshot
PacketScore: A Statistics-Based Packet Filtering Scheme against Distributed Denial-of-Service Attacks
inferredcites →https://doi.org/10.1145/1030083.1030124openalex-snapshot
On the effectiveness of address-space randomization
inferredcites →https://doi.org/10.1145/1134285.1134500openalex-snapshot
Performing systematic literature reviews in software engineering
inferredcites →https://doi.org/10.1145/1450135.1450180openalex-snapshot
A security monitoring service for NoCs
inferredcites →https://doi.org/10.1145/2768566.2768569openalex-snapshot
Towards a practical solution to detect code reuse attacks on ARM mobile devices
inferredcites →https://doi.org/10.1145/3274281openalex-snapshot
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis
inferredcites →https://doi.org/10.23919/date.2018.8342090openalex-snapshot
Earthquake — A NoC-based optimized differential cache-collision attack for MPSoCs
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s11227-025-08174-xopenalex-snapshot
ClearCache: configurable, lightweight, and accurate cache side-channel attack detection
inferred← citeshttps://doi.org/10.1109/access.2022.3233424openalex-snapshot
Toward Attack Modeling Technique Addressing Resilience in Self-Driving Car
inferred← citeshttps://doi.org/10.1109/dft66274.2025.11257462openalex-snapshot
Special Session Paper: Application of Functional Verification Techniques in Hardware Trust
inferred← citeshttps://doi.org/10.1109/gcitc60406.2023.10426323openalex-snapshot
Enhancing Prime+Probe Attack Detection Using AI and Machine Learning Techniques for Improved Security
inferred← citeshttps://doi.org/10.1109/isvlsi65124.2025.11130310openalex-snapshot
SynAssert: Automated Synthesis of CSCA Leakage Patterns into Cost-Effective Security Assertions
inferred← citeshttps://doi.org/10.1109/norcas64408.2024.10752460openalex-snapshot
Processor Vulnerability Detection with the Aid of Assertions: RISC-V Case Study
inferred← citeshttps://doi.org/10.1145/3717606openalex-snapshot
Towards Robust Cyber Attack Taxonomies: A Survey with Requirements, Structures, and Assessment
inferred← citeshttps://doi.org/10.36227/techrxiv.21088939openalex-snapshot
SAAMR: Towards Attack Modeling Technique Addressing Resilience in SDC
inferred← citeshttps://doi.org/10.36227/techrxiv.21088939.v1openalex-snapshot
SAAMR: Towards Attack Modeling Technique Addressing Resilience in SDC
inferred← citeshttps://doi.org/10.51594/csitrj.v4i3.658openalex-snapshot
REVIEW OF CYBERSECURITY STRATEGIES IN PROTECTING NATIONAL INFRASTRUCTURE: PERSPECTIVES FROM THE USA
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