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Proceedings of the 10th international conference on Architectural support for programming languages and operating systems

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Quantum Software Development Lifecycle
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Instruction scheduling methods and phase ordering framework for VLIW DSP processors with distributed register files
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Light-weight kernel instrumentation framework using dynamic binary translation
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inferred← citeshttps://doi.org/10.1007/s11704-015-5018-9openalex-snapshot
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inferred← citeshttps://doi.org/10.1007/s11704-016-5096-3openalex-snapshot
Variable strength combinatorial testing of concurrent programs
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inferred← citeshttps://doi.org/10.1016/b978-0-12-415950-1.00030-6openalex-snapshot
Transactional programming
inferred← citeshttps://doi.org/10.1016/b978-0-12-415950-1.00033-1openalex-snapshot
Bibliography
inferred← citeshttps://doi.org/10.1016/b978-155860766-8/50018-7openalex-snapshot
Bibliography
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Deploying long-lived and cost-effective hybrid sensor networks
inferred← citeshttps://doi.org/10.1016/j.cola.2024.101268openalex-snapshot
WARDuino: An embedded WebAssembly virtual machine
inferred← citeshttps://doi.org/10.1016/j.comcom.2004.06.012openalex-snapshot
The next frontier for communications networks: power management
inferred← citeshttps://doi.org/10.1016/j.ipl.2018.10.012openalex-snapshot
Upper bounds for multi-level multi-server paging
inferred← citeshttps://doi.org/10.1016/j.jksuci.2018.11.011openalex-snapshot
A Middleware based on Service Oriented Architecture for Heterogeneity Issues within the Internet of Things (MSOAH-IoT)
inferred← citeshttps://doi.org/10.1016/j.rser.2020.109901openalex-snapshot
Design architectures for energy harvesting in the Internet of Things
inferred← citeshttps://doi.org/10.1016/j.scico.2007.07.004openalex-snapshot
Java heap protection for debugging native methods
inferred← citeshttps://doi.org/10.1016/j.sysarc.2018.06.003openalex-snapshot
An integrated autonomous control mechanism to optimize sharing of multiple resources in Simultaneous Multi-Threading processors
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Dynamic multi-process information flow tracking for web application security
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DNN Intellectual Property Protection
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SpecTerminator: Blocking Speculative Side Channels Based on Instruction Classes on RISC-V
inferred← citeshttps://doi.org/10.1145/3617837openalex-snapshot
ExHiPR: Extended High-Level Partial Reconfiguration for Fast Incremental FPGA Compilation
inferred← citeshttps://doi.org/10.11606/t.55.2018.tde-10102018-141934openalex-snapshot
Search based software testing for the generation of synchronization sequences for mutation testing of concurrent programs
inferred← citeshttps://doi.org/10.1360/n112016-00006openalex-snapshot
A parallel hardware/software partitioning method based on conformity particle-swarm optimization with harmony search
inferred← citeshttps://doi.org/10.1360/ssi-2023-0034openalex-snapshot
Progress on storage systems for disaggregated data centers
inferred← citeshttps://doi.org/10.3390/computers2040176openalex-snapshot
Exploring Graphics Processing Unit (GPU) Resource Sharing Efficiency for High Performance Computing
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Memory resource balancing for virtualized computing
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