On the public citation graph

Heart-Cam: Hybrid Cmos-Rrambased Energy Efficient and Rapid Ternary Content Addressable Memory

https://doi.org/10.2139/ssrn.4898099
0 signed · 29 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/s10470-023-02181-9openalex-extracted
R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices
inferredcites →https://doi.org/10.1016/j.mee.2023.112062openalex-extracted
Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture
inferredcites →https://doi.org/10.1016/j.mejo.2013.10.006openalex-extracted
A match-line dynamic energy reduction technique for high-speed ternary CAM using dual feedback sense amplifier
inferredcites →https://doi.org/10.1016/j.mejo.2015.03.020openalex-extracted
TCAM/CAM-QCA: (Ternary) Content Addressable Memory using Quantum-dot Cellular Automata
inferredcites →https://doi.org/10.1109/edtm58488.2024.10511788openalex-extracted
ReCAM: Resistive RAM Digital Content Addressable Memory Using Novel 3T1R Bitcell
inferredcites →https://doi.org/10.1109/iedm19573.2019.8993621openalex-extracted
Novel 1T2R1T RRAM-based Ternary Content Addressable Memory for Large Scale Pattern Recognition
inferredcites →https://doi.org/10.1109/infocom.2014.6847988openalex-extracted
Packet classification using binary Content Addressable Memory
inferredcites →https://doi.org/10.1109/ispass.2006.1620796openalex-extracted
Modeling TCAM power for next generation network devices
inferredcites →https://doi.org/10.1109/jetcas.2023.3243222openalex-extracted
AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing
inferredcites →https://doi.org/10.1109/jiot.2021.3131724openalex-extracted
A Survey on IoT Big Data Analytic Systems: Current and Future
inferredcites →https://doi.org/10.1109/jproc.2011.2166369openalex-extracted
Neuromorphic, Digital, and Quantum Computation With Memory Circuit Elements
inferredcites →https://doi.org/10.1109/jproc.2015.2434888openalex-extracted
Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories
inferredcites →https://doi.org/10.1109/jssc.2005.864128openalex-extracted
Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey
inferredcites →https://doi.org/10.1109/jssc.2017.2681458openalex-extracted
A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing
inferredcites →https://doi.org/10.1109/mwscas.2017.8053021openalex-extracted
Local NOR and global NAND match-line architecture for high performance CAM
inferredcites →https://doi.org/10.1109/tcsi.2020.3018502openalex-extracted
Variability-Aware Modeling of Filamentary Oxide-Based Bipolar Resistive Switching Cells Using SPICE Level Compact Models
inferredcites →https://doi.org/10.1109/tct.1971.1083337openalex-extracted
Memristor-The missing circuit element
inferredcites →https://doi.org/10.1109/ted.2018.2849872openalex-extracted
Improved Switching Stability and the Effect of an Internal Series Resistor in HfO 2 /TiO x Bilayer ReRAM Cells
inferredcites →https://doi.org/10.1109/ted.2020.3018096openalex-extracted
HRS Instability in Oxide-Based Bipolar Resistive Switching Cells
inferredcites →https://doi.org/10.1109/ted.2021.3107497openalex-extracted
A 4T2R RRAM Bit Cell for Highly Parallel Ternary Content Addressable Memory
inferredcites →https://doi.org/10.1109/test.2018.8624895openalex-extracted
Testing Resistive Memories: Where are We and What is Missing?
inferredcites →https://doi.org/10.1109/tetc.2021.3085252openalex-extracted
High-Speed Memristive Ternary Content Addressable Memory
inferredcites →https://doi.org/10.1109/tnet.2016.2533613openalex-extracted
Packet Classification Using Binary Content Addressable Memory
inferredcites →https://doi.org/10.1109/tnet.2018.2815999openalex-extracted
TCAM-Based IP Address Lookup Using Longest Suffix Split
inferredcites →https://doi.org/10.1109/tvlsi.2019.2915358openalex-extracted
A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training
inferredcites →https://doi.org/10.1145/3365837openalex-extracted
A Classification of Memory-Centric Computing
inferredcites →https://doi.org/10.1145/3544974openalex-extracted
A Survey on Memory-centric Computer Architectures
inferredcites →https://doi.org/10.1145/3549536openalex-extracted
Data and Computation Reuse in CNNs Using Memristor TCAMs
inferredcites →https://doi.org/10.3389/fnins.2021.661856openalex-extracted
Utilizing the Switching Stochasticity of HfO2/TiOx-Based ReRAM Devices and the Concept of Multiple Device Synapses for the Classification of Overlapping and Noisy Patterns
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.