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Data and Computation Reuse in CNNs Using Memristor TCAMs
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/aelm.201600090openalex-snapshot
Memristors for Energy‐Efficient New Computing Paradigms
inferredcites →https://doi.org/10.1002/aisy.202100017openalex-snapshot
Memristive Crossbar Arrays for Storage and Computing Applications
inferredcites →https://doi.org/10.1007/978-3-030-27562-4_5openalex-snapshot
Skipping CNN Convolutions Through Efficient Memoization
inferredcites →https://doi.org/10.1109/cvpr.2017.98openalex-snapshot
LCNN: Lookup-Based Convolutional Neural Network
inferredcites →https://doi.org/10.1109/fpl50879.2020.00055openalex-snapshot
LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications
inferredcites →https://doi.org/10.1109/iccad.2007.4397290openalex-snapshot
Combinational and sequential mapping with priority cuts
inferredcites →https://doi.org/10.1109/isca.2018.00040openalex-snapshot
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks
inferredcites →https://doi.org/10.1109/isca.2018.00052openalex-snapshot
Euphrates: Algorithm-SoC Co-Design for Low-Power Mobile Continuous Vision
inferredcites →https://doi.org/10.1109/isca.2018.00062openalex-snapshot
UCNN: Exploiting Computational Reuse in Deep Neural Networks via Weight Repetition
inferredcites →https://doi.org/10.1109/isca45697.2020.00074openalex-snapshot
Hyper-Ap: Enhancing Associative Processing Through A Full-Stack Optimization
inferredcites →https://doi.org/10.1109/isscc.2018.8310397openalex-snapshot
Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications
inferredcites →https://doi.org/10.1109/jetcas.2018.2847600openalex-snapshot
Post-P&R Performance and Power Analysis for RRAM-Based FPGAs
inferredcites →https://doi.org/10.1109/jetcas.2019.2909317openalex-snapshot
ReRAM-Based In-Memory Computing for Search Engine and Neural Network Applications
inferredcites →https://doi.org/10.1109/jproc.2015.2434888openalex-snapshot
Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories
inferredcites →https://doi.org/10.1109/jssc.2019.2963616openalex-snapshot
XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
inferredcites →https://doi.org/10.1109/mm.2015.89openalex-snapshot
Resistive Ternary Content Addressable Memory Systems for Data-Intensive Computing
inferredcites →https://doi.org/10.1109/mm.2017.3211121openalex-snapshot
A Resistive CAM Processing-in-Storage Architecture for DNA Sequence Alignment
inferredcites →https://doi.org/10.1109/tc.2020.2971466openalex-snapshot
Fast Exact NPN Classification by Co-Designing Canonical Form and Its Computation Algorithm
inferredcites →https://doi.org/10.1109/tcad.2012.2185930openalex-snapshot
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory
inferredcites →https://doi.org/10.1109/tcad.2017.2705069openalex-snapshot
Angel-Eye: A Complete Design Flow for Mapping CNN Onto Embedded FPGA
inferredcites →https://doi.org/10.1109/tcad.2021.3051856openalex-snapshot
Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing
inferredcites →https://doi.org/10.1109/ted.2019.2894387openalex-snapshot
Resistive RAM Endurance: Array-Level Characterization and Correction Techniques Targeting Deep Learning Applications
inferredcites →https://doi.org/10.1109/tmag.2018.2848625openalex-snapshot
A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network
inferredcites →https://doi.org/10.1109/tnano.2018.2799872openalex-snapshot
PRINS: Processing-in-Storage Acceleration of Machine Learning
inferredcites →https://doi.org/10.1109/tnano.2019.2936239openalex-snapshot
Memristor TCAMs Accelerate Regular Expression Matching for Network Intrusion Detection
inferredcites →https://doi.org/10.1109/tvlsi.2004.824300openalex-snapshot
The effect of LUT and cluster size on deep-submicron FPGA performance and density
inferredcites →https://doi.org/10.1109/tvlsi.2013.2259512openalex-snapshot
FPGA-RPI: A Novel FPGA Architecture With RRAM-Based Programmable Interconnects
inferredcites →https://doi.org/10.1109/tvlsi.2018.2805470openalex-snapshot
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM
inferredcites →https://doi.org/10.1109/tvlsi.2018.2815603openalex-snapshot
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA
inferredcites →https://doi.org/10.1145/1391469.1391670openalex-snapshot
Reconfigurable computing using content addressable memory for improved performance and resource usage
inferredcites →https://doi.org/10.1145/3061639.3062207openalex-snapshot
Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs
inferredcites →https://doi.org/10.1145/3079856.3080246openalex-snapshot
In-Datacenter Performance Analysis of a Tensor Processing Unit
inferredcites →https://doi.org/10.1145/3154839openalex-snapshot
A GPU-Outperforming FPGA Accelerator Architecture for Binary Convolutional Neural Networks
inferredcites →https://doi.org/10.1145/3194554.3194597openalex-snapshot
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs
inferredcites →https://doi.org/10.1145/3289185openalex-snapshot
[DL] A Survey of FPGA-based Neural Network Inference Accelerators
inferredcites →https://doi.org/10.1145/3358174openalex-snapshot
Aggressive Energy Reduction for Video Inference with Software-only Strategies
inferredcites →https://doi.org/10.1145/3450769openalex-snapshot
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs
inferredcites →https://doi.org/10.1145/3469029openalex-snapshot
Machine Learning at the Network Edge: A Survey
inferredcites →https://doi.org/10.1609/aaai.v34i09.7123openalex-snapshot
Energy and Policy Considerations for Modern Deep Learning Research
inferredcites →https://doi.org/10.23919/date.2017.7927280openalex-snapshot
LookNN: Neural network with no multiplication
inferredcites →https://doi.org/10.23919/date.2018.8342202openalex-snapshot
Energy-efficient neural networks using approximate computation reuse
inferredcites →https://doi.org/10.23919/date.2018.8342235openalex-snapshot
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
inferredcites →https://doi.org/10.23919/date.2019.8714880openalex-snapshot
Energy-Efficient Convolutional Neural Networks via Recurrent Data Reuse
inferredcites →https://doi.org/10.3390/electronics8010065openalex-snapshot
A Uniform Architecture Design for Accelerating 2D and 3D CNNs on FPGAs
inferredcites →https://doi.org/10.3850/9783981537079_0454openalex-snapshot
Resistive Configurable Associative Memory for Approximate Computing
inferredcites →https://doi.org/10.4230/oasics.ng-res.2024.2openalex-snapshot
A Multi-Modal Distributed Real-Time IoT System for Urban Traffic Control (Invited Paper)
inferredcites →https://doi.org/10.48550/arxiv.1412.6115openalex-snapshot
Compressing Deep Convolutional Networks using Vector Quantization
inferredcites →https://doi.org/10.48550/arxiv.1510.00149openalex-snapshot
Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Coding
inferredcites →https://doi.org/10.48550/arxiv.1602.02830openalex-snapshot
Binarized Neural Networks: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.2139/ssrn.4898099openalex-extracted
Heart-Cam: Hybrid Cmos-Rrambased Energy Efficient and Rapid Ternary Content Addressable Memory
inferred← citeshttps://doi.org/10.1016/j.sysarc.2025.103529openalex-snapshot
SIRENA: SparsIty-REpetition aware Nibble-based hardware Accelerator for convolutional neural networks
inferred← citeshttps://doi.org/10.1016/j.tifs.2025.105162openalex-snapshot
Convolutional neural networks in the realm of food quality and safety evaluation: Current achievements and future prospects
inferred← citeshttps://doi.org/10.1109/icrc57508.2022.00013openalex-snapshot
TCAmMCogniGron: Energy Efficient Memristor-Based TCAM for Match-Action Processing
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