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Machine Learning System Architecture and Training Method Optimization for Financial Data Center Based on Heterogeneous Ai Chips

https://doi.org/10.2139/ssrn.5082369
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Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/hpca.2001.903263openalex-extracted
Dynamic branch prediction with perceptrons
inferredcites →https://doi.org/10.1109/hpca.2015.7056067openalex-extracted
BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing
inferredcites →https://doi.org/10.1109/iccad.2015.7372593openalex-extracted
Uncore RPD: Rapid design space exploration of the uncore via regression modeling
inferredcites →https://doi.org/10.1109/iccd46524.2019.00016openalex-extracted
Characterizing On-Chip Traffic Patterns in General-Purpose GPUs: A Deep Learning Approach
inferredcites →https://doi.org/10.1109/icpp.2008.36openalex-extracted
Machine Learning Models to Predict Performance of Computer System Design Alternatives
inferredcites →https://doi.org/10.1109/icpp.2014.46openalex-extracted
Adaptive Configuration Selection for Power-Constrained Heterogeneous Systems
inferredcites →https://doi.org/10.1109/isca.2008.21openalex-extracted
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
inferredcites →https://doi.org/10.1109/lca.2019.2905587openalex-extracted
Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning
inferredcites →https://doi.org/10.1109/nocs.2012.12openalex-extracted
In-network Monitoring and Control Policy for DVFS of CMP Networks-on-Chip and Last Level Caches
inferredcites →https://doi.org/10.1109/sbac-pad.2017.23openalex-extracted
A Machine Learning Approach for Performance Prediction and Scheduling on Heterogeneous CPUs
inferredcites →https://doi.org/10.1109/test.2016.7805863openalex-extracted
Cross-layer system reliability assessment framework for hardware faults
inferredcites →https://doi.org/10.1145/1921249.1921254openalex-extracted
A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip
inferredcites →https://doi.org/10.1145/2504905openalex-extracted
In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches
inferredcites →https://doi.org/10.1145/3061639.3062235openalex-extracted
Efficient Hierarchical Performance Modeling for Integrated Circuits via Bayesian Co-Learning
inferredcites →https://doi.org/10.1145/3132402.3132405openalex-extracted
Long short term memory based hardware prefetcher
inferredcites →https://doi.org/10.1145/3183713.3196909openalex-extracted
The Case for Learned Index Structures
inferredcites →https://doi.org/10.1145/3225058.3225106openalex-extracted
Disk Failure Prediction in Data Centers via Online Learning
inferredcites →https://doi.org/10.1145/3307650.3322207openalex-extracted
Perceptron-based prefetch filtering
inferredcites →https://doi.org/10.1145/3494523openalex-extracted
A Survey of Machine Learning for Computer Architecture and Systems
inferredcites →https://doi.org/10.3850/9783981537079_0083openalex-extracted
Machine Learned Machines: Adaptive Co-optimization of Caches, Cores, and On-chip Network
inferredcites →https://doi.org/10.48550/arxiv.1603.04467openalex-extracted
TensorFlow: Large-Scale Machine Learning on Heterogeneous Distributed Systems
inferredcites →https://doi.org/10.7873/date.2013.083openalex-extracted
SVR-NoC: A Performance Analysis Tool for Network-on-Chips Using Learning-based Support Vector Regression Model
inferredcites →https://doi.org/10.5555/2840819.2840871openalex-snapshot
Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling
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