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ITPACKV 2D user's guide

https://doi.org/10.2172/7093021
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High Performance Multi-GPU SpMV for Multi-component PDE-Based Applications
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Automatic tuning of the sparse matrix vector product on GPUs based on the ELLR-T approach
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Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration
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Pipirima: Predicting Patterns in Sparsity to Accelerate Matrix Algebra
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ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator
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Iterative Methods for Sparse Linear Systems on Graphics Processing Unit
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Adaptive Optimization of Sparse Matrix-Vector Multiplication on Emerging Many-Core Architectures
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GraphLily: Accelerating Graph Linear Algebra on HBM-Equipped FPGAs
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Efficiently Running SpMV on Multi-Core DSPs for Block Sparse Matrix
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Efficient PageRank and SpMV Computation on AMD GPUs
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Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads
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A Compression Method for Storage Formats of a Sparse Matrix in Solving the Large-Scale Linear Systems
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Fast Sparse Matrix Matrix Product Based on ELLR-T and GPU Computing
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Simit
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Compilation of Modular and General Sparse Workspaces
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Exploiting Unstructured Sparsity in Fully Homomorphic Encrypted DNNs
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Chasoň: Supporting Cross HBM Channel Data Migration to Enable Efficient Sparse Algebraic Acceleration
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Towards Efficient Symmetric Sparse Matrix-Vector Multiplication on Multi-Cores
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Efficient CUDA Polynomial Preconditioned Conjugate Gradient Solver for Finite Element Computation of Elasticity Problems
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Enhancing Sparse Data Processing through Energy-Efficient Heterogeneous Architectures
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Application-Specific Memory Subsystem Benchmarking
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GILA User's Manual
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Evaluation of architectural paradigms for addressing theprocessor-memory gap
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Scientific kernels on VIRAM and imagine media processors
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ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory
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CRISP: Hybrid Structured Sparsity for Class-Aware Model Pruning
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Auto-Selection of an Optimal Sparse Matrix Format in the Neuro-Simulator ANNarchy
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Asynchronized Jacobi Solver on Heterogeneous Mobile Devices
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Optimizing Sparse Matrix-Vector Multiplication on Emerging Many-Core Architectures
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Sparse Matrix to Matrix Multiplication: A Representation and Architecture for Acceleration (long version)
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A High-Performance Sparse Tensor Algebra Compiler in Multi-Level IR
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Accelerating the SpMV kernel on standard CPUs by exploiting the partially diagonal structures
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