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A linear-size quantum circuit for addition with no ancillary qubits

https://doi.org/10.26421/qic5.6-2
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1103/physreva.52.3457openalex-snapshot
Elementary gates for quantum computation
inferredcites →https://doi.org/10.1103/physreva.54.147openalex-snapshot
Quantum networks for elementary arithmetic operations
inferredcites →https://doi.org/10.1109/sfcs.1994.365700openalex-snapshot
Algorithms for quantum computation: discrete logarithms and factoring
inferredcites →https://doi.org/10.1119/1.1463744openalex-snapshot
Quantum Computation and Quantum Information
inferredcites →https://doi.org/10.26421/qic3.2-8openalex-snapshot
Circuit for Shor's algorithm using 2n+3 qubits
inferredcites →https://doi.org/10.26421/qic6.4-5-4openalex-snapshot
A logarithmic-depth quantum carry-lookahead adder
inferredcites →https://doi.org/10.48550/arxiv.quant-ph/0008033openalex-snapshot
Addition on a Quantum Computer

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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Mapping of Subtractor and Adder-Subtractor Circuits on Reversible Quantum Gates
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Efficient Circuit Design of Reversible Square
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Synthesis of Reversible Logic
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An optimized quantum circuit for converting from sign–magnitude to two’s complement
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Quantum algorithms for numerical differentiation of expected values with respect to parameters
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An improved circuit for Shor’s factoring algorithm using $$2n+2$$ qubits
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Reversible logic based multiplication computing unit using binary tree data structure
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Design procedures and NML cost analysis of reversible barrel shifters optimizing garbage and ancilla lines
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Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier
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Efficient design of a quantum absolute-value circuit using Clifford+T gates
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A review on reversible quantum adders
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SyReC: A hardware description language for the specification and synthesis of reversible circuits
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T‐depth reduction method for efficient SHA‐256 quantum circuit construction
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A novel reversible carry-selected adder with low latency
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A comprehensive study of quantum arithmetic circuits
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Reduction of qubits in a quantum algorithm for Monte Carlo simulation by a pseudo-random-number generator
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Computational Refinements for Post-Quantum Elliptic Curve Security
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A new reversible design of BCD adder
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Design of optimized reversible binary adder/subtractor and BCD adder
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Towards HDL-based Synthesis of Reversible Circuits with No Additional Lines
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Low-quantum cost circuit constructions for adder and symmetric Boolean functions
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Crosstalk Attack Resilient RNS Quantum Addition
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From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits
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Quantum Computing, Cryptography and Compilers
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Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic
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Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies
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Surf-Deformer: Mitigating Dynamic Defects on Surface Code via Adaptive Deformation
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The SyReC hardware description language: Enabling scalable synthesis of reversible circuits
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Pricing Multi-Asset Derivatives by Finite-Difference Method on a Quantum Computer
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Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits
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Quantum pricing with a smile: implementation of local volatility model on quantum computer
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Designs of the divider and special multiplier optimizing T and CNOT gates
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Design Methodologies for Reversible Logic Based Barrel Shifters
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A Θ( √ n)-depth quantum adder on the 2D NTC quantum computer architecture
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Design of efficient reversible logic-based binary and BCD adder circuits
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A Resource-Efficient Design for a Reversible Floating Point Adder in Quantum Computing
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Optimizing T and CNOT Gates in Quantum Ripple-Carry Adders and Comparators
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A survey of the research on quantum circuit synthesis and optimization of symmetric-key cryptography
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Quantum Arithmetic Circuits: A Survey
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Novel reversible CLA, optimized RCA and parallel adder/subtractor circuits
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Quantum addition circuits and unbounded fan-out
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A 2D nearest-neighbor quantum architecture for factoring in polylogarithmic depth
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Fast quantum modular exponentiation architecture for Shor's factoring alogrithm
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Quantum arithmetic and numerical analysis using Repeat-Until-Success circuits
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Quantum algorithms and circuits for scientific computing
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A quantum circuit for Shor's factoring algorithm using 2n+2 qubits
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A fast quantum circuit for addition with few qubits
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Ancilla-Input and Garbage-Output Optimized Design of a Reversible Quantum Integer Multiplier
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Quantum Circuit Design of Integer Division Optimizing Ancillary Qubits and T-Count
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Shor's algorithm on a nearest-neighbor machine
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РЕАЛИЗАЦИЯ КВАНТОВЫХ АРИФМЕТИЧЕСКИХ ОПЕРАЦИЙ С ЦЕЛОЧИСЛЕННЫМИ СИМВОЛАМИ С ПОМОЩЬЮ КВАНТОВОГО ПРЕОБРАЗОВАНИЯ ФУРЬЕ
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Quantum Algorithms for Scientific Computing and Approximate Optimization
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