On the public citation graph

FPGA Implementation of High-Efficiency ECC Point Multiplication Circuit

https://doi.org/10.3390/electronics10111252

0 signed · 35 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.

Claim with ORCID

Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.

See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-319-60435-0_18openalex-snapshot

Practical Techniques for Securing the Internet of Things (IoT) Against Side Channel Attacks

inferredcites →https://doi.org/10.1016/0890-5401(88)90024-7openalex-snapshot

A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases

inferredcites →https://doi.org/10.1049/iet-cdt.2018.5056openalex-snapshot

Throughput/area optimised pipelined architecture for elliptic curve crypto processor

inferredcites →https://doi.org/10.1109/cis.2013.145openalex-snapshot

A Survey on the Internet of Things Security

inferredcites →https://doi.org/10.1109/isesd.2018.8605444openalex-snapshot

Implementation of ECC on Reconfigurable FPGA Using Hard Processor System

inferredcites →https://doi.org/10.1109/jiot.2021.3065836openalex-snapshot

Novel Strong-PUF-Based Authentication Protocols Leveraging Shamir’s Secret Sharing

inferredcites →https://doi.org/10.1109/jiot.2021.3068410openalex-snapshot

A Privacy-Aware PUFs-Based Multiserver Authentication Protocol in Cloud-Edge IoT Systems Using Blockchain

inferredcites →https://doi.org/10.1109/jproc.2014.2320516openalex-snapshot

Physical Unclonable Functions and Applications: A Tutorial

inferredcites →https://doi.org/10.1109/mc.2013.63openalex-snapshot

The Internet of Things: The Next Technological Revolution

inferredcites →https://doi.org/10.1109/tcsi.2016.2614309openalex-snapshot

Low-Latency, Low-Area, and Scalable Systolic-Like Modular Multipliers for $GF(2^{m})$ Based on Irreducible All-One Polynomials

inferredcites →https://doi.org/10.1109/tcsii.2017.2785382openalex-snapshot

High-Performance Pipelined Architecture of Point Multiplication on Koblitz Curves

inferredcites →https://doi.org/10.1109/tie.2012.2186104openalex-snapshot

Efficient Elliptic Curve Point Multiplication Using Digit-Serial Binary Field Operations

inferredcites →https://doi.org/10.1109/tifs.2013.2279798openalex-snapshot

PUF Modeling Attacks on Simulated and Silicon Data

inferredcites →https://doi.org/10.1109/tvlsi.2016.2574620openalex-snapshot

High-Speed and Low-Latency ECC Processor Implementation Over GF( $2^{m})$ on FPGA

inferredcites →https://doi.org/10.11591/ijece.v8i5.pp3544-3549openalex-snapshot

Comparison of AES and DES Algorithms Implemented on Virtex-6 FPGA and Microblaze Soft Core Processor

inferredcites →https://doi.org/10.3390/s19112428openalex-snapshot

Intrinsic Physical Unclonable Function (PUF) Sensors in Commodity Devices

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-981-19-7982-8_31openalex-snapshot

Power-Efficient Hardware Design of ECC Algorithm on High Performance FPGA

inferred← citeshttps://doi.org/10.1007/s10470-025-02378-0openalex-snapshot

Optimised elliptic curve cryptography architecture for improved V2x communication

inferred← citeshttps://doi.org/10.1007/s11235-026-01444-wopenalex-snapshot

Design and FPGA implementation of an area-efficient elliptic curve cryptographic processor

inferred← citeshttps://doi.org/10.1038/s41598-025-99100-xopenalex-snapshot

Low latency FPGA implementation of twisted Edward curve cryptography hardware accelerator over prime field

inferred← citeshttps://doi.org/10.1109/access.2022.3141104openalex-snapshot

Efficient Hardware Implementation of Large Field-Size Elliptic Curve Cryptographic Processor

inferred← citeshttps://doi.org/10.1109/access.2024.3403771openalex-snapshot

FPGA Implementation of Elliptic-Curve Point Multiplication Over GF(2233) Using Booth Polynomial Multiplier for Area-Sensitive Applications

inferred← citeshttps://doi.org/10.1109/acfpe59335.2023.10455632openalex-snapshot

Research on ECC Algorithm FPGA Acceleration Circuit for High Reliable AIoT System

inferred← citeshttps://doi.org/10.1109/sist61555.2024.10629505openalex-snapshot

HSTL IO Standards Based Low Power Implementation of Elliptic Curve Cryptography (ECC) on FPGA

inferred← citeshttps://doi.org/10.1109/tvlsi.2023.3268999openalex-snapshot

Speed/Area-Efficient ECC Processor Implementation Over GF(2 m ) on FPGA via Novel Algorithm-Architecture Co-Design

inferred← citeshttps://doi.org/10.1142/s0218126625500896openalex-snapshot

Point Multiplication Acceleration Over Edwards25519 Using FPGA

inferred← citeshttps://doi.org/10.1145/3696422openalex-snapshot

A Systematic Review of Fast, Scalable, and Efficient Hardware Implementations of Elliptic Curve Cryptography for Blockchain

inferred← citeshttps://doi.org/10.19101/ijatee.2021.875995openalex-snapshot

High speed elliptic curve cryptography architecture for NIST recommended Galois field

inferred← citeshttps://doi.org/10.3390/app13020869openalex-snapshot

Large Field-Size Throughput/Area Accelerator for Elliptic-Curve Point Multiplication on FPGA

inferred← citeshttps://doi.org/10.3390/app13031240openalex-snapshot

Large Field-Size Elliptic Curve Processor for Area-Constrained Applications

inferred← citeshttps://doi.org/10.3390/app13074194openalex-snapshot

A Unified Point Multiplication Architecture of Weierstrass, Edward and Huff Elliptic Curves on FPGA

inferred← citeshttps://doi.org/10.3390/electronics12194110openalex-snapshot

Power/Area-Efficient ECC Processor Implementation for Resource-Constrained Devices

inferred← citeshttps://doi.org/10.3390/mi14051037openalex-snapshot

FPGA Implementation for Elliptic Curve Cryptography Algorithm and Circuit with High Efficiency and Low Delay for IoT Applications

inferred← citeshttps://doi.org/10.3390/s24186011openalex-snapshot

An Efficient SM9 Aggregate Signature Scheme for IoV Based on FPGA

inferred← citeshttps://doi.org/10.53898/josse2024429openalex-snapshot

Design and Application of Agricultural Integrated Management System Based on TLINK

Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.