On the public citation graph

Lightweight Modeling Attack-Resistant Multiplexer-Based Multi-PUF (MMPUF) Design on FPGA

0 signed · 64 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-32494-1_4openalex-snapshot
The CMA Evolution Strategy: A Comparing Review
inferredcites →https://doi.org/10.1007/978-3-540-74735-2_5openalex-snapshot
FPGA Intrinsic PUFs and Their Use for IP Protection
inferredcites →https://doi.org/10.1007/978-3-662-48324-4_27openalex-snapshot
The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs
inferredcites →https://doi.org/10.1109/asianhost.2016.7835567openalex-snapshot
RPUF: Physical Unclonable Function with Randomized Challenge to resist modeling attack
inferredcites →https://doi.org/10.1109/asianhost.2018.8607173openalex-snapshot
Machine Learning Attacks on Voltage Over-scaling-based Lightweight Authentication
inferredcites →https://doi.org/10.1109/asianhost47458.2019.9006710openalex-snapshot
A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication
inferredcites →https://doi.org/10.1109/aspdac.2017.7858345openalex-snapshot
VOLtA: Voltage over-scaling based lightweight authentication for IoT applications
inferredcites →https://doi.org/10.1109/aspdac.2018.8297289openalex-snapshot
A machine learning attack resistant multi-PUF design on FPGA
inferredcites →https://doi.org/10.1109/bigdata47090.2019.9006041openalex-snapshot
Examination of Double Arbiter PUFs on Security against Machine Learning Attacks
inferredcites →https://doi.org/10.1109/dac.2007.375043openalex-snapshot
Physical Unclonable Functions for Device Authentication and Secret Key Generation
inferredcites →https://doi.org/10.1109/hst.2014.6855565openalex-snapshot
On design of a highly secure PUF based on non-linear current mirrors
inferredcites →https://doi.org/10.1109/hst.2014.6855567openalex-snapshot
Composite PUF: A new design paradigm for Physically Unclonable Functions on FPGA
inferredcites →https://doi.org/10.1109/hst.2014.6855582openalex-snapshot
A noise bifurcation architecture for linear additive physical functions
inferredcites →https://doi.org/10.1109/iccad.2008.4681648openalex-snapshot
Lightweight secure PUFs
inferredcites →https://doi.org/10.1109/iscas.2014.6865362openalex-snapshot
A unique and robust single slice FPGA identification generator
inferredcites →https://doi.org/10.1109/iscas.2017.8050671openalex-snapshot
Low-cost fortification of arbiter PUF against modeling attack
inferredcites →https://doi.org/10.1109/isqed.2017.7918334openalex-snapshot
FPGA implementation of modeling attack resistant arbiter PUF with enhanced reliability
inferredcites →https://doi.org/10.1109/percomw.2016.7457162openalex-snapshot
Obfuscated challenge-response: A secure lightweight authentication mechanism for PUF-based pervasive devices
inferredcites →https://doi.org/10.1109/socc.2016.7905439openalex-snapshot
Novel lightweight FF-APUF design for FPGA
inferredcites →https://doi.org/10.1109/spw.2012.30openalex-snapshot
Slender PUF Protocol: A Lightweight, Robust, and Secure Authentication by Substring Matching
inferredcites →https://doi.org/10.1109/tc.2017.2749226openalex-snapshot
A Multiplexer-Based Arbiter PUF Composition with Enhanced Reliability and Security
inferredcites →https://doi.org/10.1109/tcad.2015.2488493openalex-snapshot
PolyPUF: Physically Secure Self-Divergence
inferredcites →https://doi.org/10.1109/tcad.2019.2962115openalex-snapshot
Approximation Attacks on Strong PUFs
inferredcites →https://doi.org/10.1109/tifs.2013.2279798openalex-snapshot
PUF Modeling Attacks on Simulated and Silicon Data
inferredcites →https://doi.org/10.1109/tvlsi.2005.859470openalex-snapshot
Extracting secret keys from integrated circuits
inferredcites →https://doi.org/10.1109/tvlsi.2016.2606658openalex-snapshot
DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication
inferredcites →https://doi.org/10.1109/wifs.2012.6412622openalex-snapshot
Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability
inferredcites →https://doi.org/10.1126/science.1074376openalex-snapshot
Physical One-Way Functions
inferredcites →https://doi.org/10.1145/1278480.1278484openalex-snapshot
Physical unclonable functions for device authentication and secret key generation
inferredcites →https://doi.org/10.1145/1866307.1866335openalex-snapshot
Modeling attacks on physical unclonable functions
inferredcites →https://doi.org/10.1145/2656075.2656099openalex-snapshot
System-of-PUFs
inferredcites →https://doi.org/10.1145/2976749.2989039openalex-snapshot
POSTER
inferredcites →https://doi.org/10.1145/3053681openalex-snapshot
Improved Reliability of FPGA-Based PUF Identification Generator Design
inferredcites →https://doi.org/10.1145/3139324.3139328openalex-snapshot
EM Side-Channel Analysis of BCH-based Error Correction for PUF-based Key Generation
inferredcites →https://doi.org/10.1145/586110.586132openalex-snapshot
Silicon physical random functions
inferredcites →https://doi.org/10.46586/tches.v2019.i4.243-290openalex-snapshot
The Interpose PUF: Secure PUF Design against State-of-the-art Machine Learning Attacks
inferredcites →https://doi.org/10.5555/2755753.2755903openalex-snapshot
A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics
inferredcites →https://doi.org/10.7873/date.2014.083openalex-snapshot
An efficient reliable PUF-based cryptographic key generator in 65nm CMOS
inferredcites →https://doi.org/10.7873/date.2015.0522openalex-snapshot
A Novel Modeling Attack Resistant PUF Design based on Non-linear Voltage Transfer Characteristics

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/advs.202302604openalex-snapshot
Machine Learning Attacks‐Resistant Security by Mixed‐Assembled Layers‐Inserted Graphene Physically Unclonable Function
inferred← citeshttps://doi.org/10.1007/978-3-030-52067-0_26openalex-snapshot
An Artificial Intelligence Authentication Framework to Secure Internet of Educational Things
inferred← citeshttps://doi.org/10.1007/s11227-024-06371-8openalex-snapshot
Adaptive PUF design to authenticate and evaluate heterogeneous IPs in edge computing
inferred← citeshttps://doi.org/10.1016/j.cose.2026.104885openalex-snapshot
Modeling of physical unclonable functions (PUF): A systematic literature review
inferred← citeshttps://doi.org/10.1016/j.jksuci.2024.101996openalex-snapshot
Harnessing the advances of MEDA to optimize multi-PUF for enhancing IP security of biochips
inferred← citeshttps://doi.org/10.1016/j.mejo.2021.105314openalex-snapshot
M-RO PUF: A portable pure digital RO PUF based on MUX unit
inferred← citeshttps://doi.org/10.1016/j.mejo.2025.106867openalex-snapshot
Authentication scheme resistant to machine learning based on obfuscation of multiple PUF responses
inferred← citeshttps://doi.org/10.1016/j.micpro.2022.104667openalex-snapshot
An efficient modeling attack for breaking the security of XOR-Arbiter PUFs by using the fully connected and long-short term memory
inferred← citeshttps://doi.org/10.1016/j.vlsi.2025.102459openalex-snapshot
A lightweight general PUF framework for resisting machine learning attacks
inferred← citeshttps://doi.org/10.1049/cds2.12042openalex-snapshot
MARPUF: physical unclonable function with improved machine learning attack resistance
inferred← citeshttps://doi.org/10.1109/access.2021.3053307openalex-snapshot
Resilient Password Manager Using Physical Unclonable Functions
inferred← citeshttps://doi.org/10.1109/access.2023.3264016openalex-snapshot
Arbiter PUF—A Review of Design, Composition, and Security Aspects
inferred← citeshttps://doi.org/10.1109/asiancon58793.2023.10270675openalex-snapshot
Redesigning of High Swing Super Wilson Current Mirror Circuit
inferred← citeshttps://doi.org/10.1109/asianhost59942.2023.10409383openalex-snapshot
A Lightweight and Machine-Learning-Resistant PUF framework based on Nonlinear Structure and Obfuscating Challenges
inferred← citeshttps://doi.org/10.1109/asianhost63913.2024.10838475openalex-snapshot
A Novel FPGA Mutually Coupled Configurable Ring Oscillator PUF
inferred← citeshttps://doi.org/10.1109/ats59501.2023.10318014openalex-snapshot
A Logic Encryption-Enhanced PUF Architecture to Deceive Machine Learning-Based Modeling Attacks
inferred← citeshttps://doi.org/10.1109/compas67506.2025.11381648openalex-snapshot
Cybersecurity Threats Prevention through PUF Based Dynamic Logic Morphing on IoT Edge Devices
inferred← citeshttps://doi.org/10.1109/eurosp57164.2023.00015openalex-snapshot
A Generic Obfuscation Framework for Preventing ML-Attacks on Strong-PUFs through Exploitation of DRAM-PUFs
inferred← citeshttps://doi.org/10.1109/host54066.2022.9839670openalex-snapshot
A Novel Attack on Machine-Learning Resistant Physical Unclonable Functions
inferred← citeshttps://doi.org/10.1109/socc56010.2022.9908089openalex-snapshot
Modeling Attacks Resilient Multiple PUF-CPRNG Architecture Design Methodology
inferred← citeshttps://doi.org/10.1109/socc62300.2024.10737787openalex-snapshot
Multiple PUF-CPRNG based Authentication Methodology for Protecting the IP Cores
inferred← citeshttps://doi.org/10.1109/tcad.2024.3447211openalex-snapshot
FDPUF: Frequency-Domain PUF for Robust Authentication of Edge Devices
inferred← citeshttps://doi.org/10.1109/tvlsi.2022.3189953openalex-snapshot
A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs
inferred← citeshttps://doi.org/10.1145/3491212openalex-snapshot
Implementation, Characterization and Application of Path Changing Switch based Arbiter PUF on FPGA as a lightweight Security Primitive for IoT
inferred← citeshttps://doi.org/10.32604/iasc.2023.040502openalex-snapshot
A Novel Attack on Complex APUFs Using the Evolutionary Deep Convolutional Neural Network
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.