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A Novel High-Speed and Low-PDP Approximate Full Adder Cell for Image Blending
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1002/cta.2672openalex-snapshot
A low leakage TG‐CNTFET–based inexact full adder for low power image processing applications
inferredcites →https://doi.org/10.1016/j.compeleceng.2020.106761openalex-snapshot
Process variation-aware approximate full adders for imprecision-tolerant applications
inferredcites →https://doi.org/10.1016/j.mejo.2020.104962openalex-snapshot
Design of efficient approximate 1-bit Full Adder cells using CNFET technology applicable in motion detector systems
inferredcites →https://doi.org/10.1016/j.suscom.2021.100529openalex-snapshot
LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS
inferredcites →https://doi.org/10.1080/00207217.2019.1576232openalex-snapshot
An efficient inexact Full Adder cell design in CNFET technology with high-PSNR for image processing
inferredcites →https://doi.org/10.1080/00207217.2021.1966662openalex-snapshot
High-performance and low-energy approximate full adder design for error-resilient image processing
inferredcites →https://doi.org/10.1080/03772063.2022.2043785openalex-snapshot
High-Performance 10-Transistor Adder Cell for Low-Power Applications
inferredcites →https://doi.org/10.1109/iccke57176.2022.9960118openalex-snapshot
Design and Simulation of a Low PDP Full Adder by Combining Majority Function and TGDI Technique in CNTFET Technology
inferredcites →https://doi.org/10.1109/icctct.2018.8551109openalex-snapshot
CMOS-DRPTL Adder Topologies
inferredcites →https://doi.org/10.1109/iced.2008.4786783openalex-snapshot
Considerations of performance factors in CMOS designs
inferredcites →https://doi.org/10.1109/icses52305.2021.9633858openalex-snapshot
Comparative Study of Gradient Domain Based Image Blending Approaches
inferredcites →https://doi.org/10.1109/mdat.2015.2505723openalex-snapshot
Approximate Computing: A Survey
inferredcites →https://doi.org/10.1109/pcee.2002.1115341openalex-snapshot
Computation-intensive image processing algorithm parallelization on multiple hardware architectures
inferredcites →https://doi.org/10.1109/pcs50896.2021.9477470openalex-snapshot
On the Computation of PSNR for a Set of Images or Video
inferredcites →https://doi.org/10.1109/tc.2012.146openalex-snapshot
New Metrics for the Reliability of Approximate and Probabilistic Adders
inferredcites →https://doi.org/10.1109/ted.2007.909030openalex-snapshot
A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application—Part I: Model of the Intrinsic Channel Region
inferredcites →https://doi.org/10.1109/ted.2007.909043openalex-snapshot
A Compact SPICE Model for Carbon-Nanotube Field-Effect Transistors Including Nonidealities and Its Application—Part II: Full Device Model and Circuit Performance Benchmarking
inferredcites →https://doi.org/10.1109/tetc.2019.2929100openalex-snapshot
Design and Analysis of Majority Logic-Based Approximate Adders and Multipliers
inferredcites →https://doi.org/10.1109/tip.2003.819861openalex-snapshot
Image quality assessment: from error visibility to structural similarity
inferredcites →https://doi.org/10.1145/3524061openalex-snapshot
A Novel Highly-Efficient Inexact Full Adder Cell for Motion and Edge Detection Systems of Image Processing in CNFET Technology
inferredcites →https://doi.org/10.3390/electronics10010079openalex-snapshot
Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits
inferredcites →https://doi.org/10.3390/electronics11091455openalex-snapshot
CNTFET-Based Ternary Multiply-and-Accumulate Unit
inferredcites →https://doi.org/10.3390/electronics11131937openalex-snapshot
Hunting Energy Bugs in Embedded Systems: A Software-Model-In-The-Loop Approach
inferredcites →https://doi.org/10.3390/electronics11193095openalex-snapshot
Digital Image Blending Using Inaccurate Addition
inferredcites →https://doi.org/10.3390/electronics11244202openalex-snapshot
High-Speed Grouping and Decomposition Multiplier for Binary Multiplication
inferredcites →https://doi.org/10.3390/electronics12040848openalex-snapshot
Approximate Computing-Based Processing of MEA Signals on FPGA
inferredcites →https://doi.org/10.3390/jlpea12030046openalex-snapshot
High-Speed and Energy-Efficient Carry Look-Ahead Adder
inferredcites →https://doi.org/10.3390/mi13081257openalex-snapshot
Carbon-Related Materials: Graphene and Carbon Nanotubes in Semiconductor Applications and Design
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1002/eng2.70262openalex-snapshot
FPGA ‐Based Design of Ultra‐Efficient Approximate Adders for High‐Fidelity Image Processing: A Logic‐Optimized Approach
inferred← citeshttps://doi.org/10.1002/jnm.3320openalex-snapshot
Static Approximate Modified Mirror—Full Adder for High Speed and Low Power Operations Using 32 nm CNTFET Technology
inferred← citeshttps://doi.org/10.1016/j.aeue.2024.155626openalex-snapshot
CNTFET based leakage control static approximate full adder circuit for high performance multimedia applications
inferred← citeshttps://doi.org/10.1016/j.aeue.2026.156528openalex-snapshot
Ultra-low power 4:2 CNTFET-based approximate compressor and 8 × 8 DADDA multiplier circuits for image multiplication application
inferred← citeshttps://doi.org/10.1016/j.eswa.2024.123782openalex-snapshot
An ultra-low-computation model for understanding sign languages
inferred← citeshttps://doi.org/10.1109/conit65521.2025.11167032openalex-snapshot
Approximate Adder for Image Processing with Enhanced Energy Efficiency
inferred← citeshttps://doi.org/10.1109/devic63749.2025.11012517openalex-snapshot
Low-power and High-speed CNTFET based Four-bit Static Approximate Modified Mirror Ripple Carry Adder for Image Processing
inferred← citeshttps://doi.org/10.1109/ecai65401.2025.11095520openalex-snapshot
Design and Implementation of Reconfigurable Approximate Adder in Real Time for Image Watermarking
inferred← citeshttps://doi.org/10.1109/ecai65401.2025.11095608openalex-snapshot
Design and Implementation of Energy-Efficient Approximate Adder Supporting Image Processing Applications
inferred← citeshttps://doi.org/10.1109/ecai69016.2026.11613834openalex-snapshot
Energy Efficient Approximate Adder Architecture for Breast Cancer Image Processing Application
inferred← citeshttps://doi.org/10.1142/s0218126625500070openalex-snapshot
HEAD: High-Speed Approximate HEterogeneous ADder for Error-Resilient Applications
inferred← citeshttps://doi.org/10.1149/2162-8777/adf99eopenalex-snapshot
12T-SLCAFA: Novel Design of a Stacked Leakage Control Approximate Full Adder Featuring Twelve 32 nm CNTFET Devices for Image Sharpening Application
inferred← citeshttps://doi.org/10.1186/s11671-026-04814-0openalex-snapshot
Design and simulation of a CNTFET based approximate full adder for low power nanoelectronic and image processing applications
inferred← citeshttps://doi.org/10.53314/els2630055sopenalex-snapshot
Low Power CNTFET 3-Transistor Approximate Full Adder for Real-Time Edge Image Processing
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