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Threshold Voltage Distribution in MLC NAND Flash Memory: Characterization, Analysis and Modeling

https://doi.org/10.7873/date.2013.266

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Minato: A Read-Disturb-Aware Dynamic Buffer Management Scheme for NAND Flash Memory

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Exploiting Metadata to Estimate Read Reference Voltage for 3-D nand Flash Memory

inferred← citeshttps://doi.org/10.1109/tce.2023.3319638openalex-snapshot

ALCod: Adaptive LDPC Coding for 3-D NAND Flash Memory Using Inter-Layer RBER Variation

inferred← citeshttps://doi.org/10.1109/tce.2023.3332888openalex-snapshot

Exploiting Feature Layer for Read Reference Voltage Optimization on 3-D NAND Flash Memory

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ECCPM: An Efficient Internal Data Migration Scheme for Flash Memory Systems

inferred← citeshttps://doi.org/10.1109/tcomm.2015.2453413openalex-snapshot

Adaptive Read Thresholds for NAND Flash

inferred← citeshttps://doi.org/10.1109/tcomm.2016.2518682openalex-snapshot

Spreading Modulation for Multilevel Nonvolatile Memories

inferred← citeshttps://doi.org/10.1109/tcomm.2016.2533498openalex-snapshot

Read and Write Voltage Signal Optimization for Multi-Level-Cell (MLC) NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/tcomm.2016.2584602openalex-snapshot

Channel Models for Multi-Level Cell Flash Memories Based on Empirical Error Analysis

inferred← citeshttps://doi.org/10.1109/tcomm.2019.2922391openalex-snapshot

Union Bound Analysis and Code Design for Multilevel Flash Memory Channels

inferred← citeshttps://doi.org/10.1109/tcomm.2020.2974723openalex-snapshot

Deep Learning-Aided Dynamic Read Thresholds Design for Multi-Level-Cell Flash Memories

inferred← citeshttps://doi.org/10.1109/tcomm.2024.3357616openalex-snapshot

Deep Transfer Learning-Based Detection for Flash Memory Channels

inferred← citeshttps://doi.org/10.1109/tcomm.2024.3442691openalex-snapshot

Flash-Gen: Spatio-Temporal Generator for Flash Memory Systems

inferred← citeshttps://doi.org/10.1109/tcsi.2014.2370171openalex-snapshot

Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage

inferred← citeshttps://doi.org/10.1109/tcsi.2017.2714902openalex-snapshot

Decision-Directed Retention-Failure Recovery With Channel Update for MLC NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/tcsi.2020.3047484openalex-snapshot

Characterization of Inter-Cell Interference in 3D NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/tcsi.2022.3164995openalex-snapshot

A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells

inferred← citeshttps://doi.org/10.1109/tcsii.2016.2602359openalex-snapshot

Retention-Aware Belief-Propagation Decoding for NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/tdmr.2015.2448108openalex-snapshot

Quality-of-Service Implications of Enhanced Program Algorithms for Charge-Trapping NAND in Future Solid-State Drives

inferred← citeshttps://doi.org/10.1109/tdmr.2021.3108941openalex-snapshot

Investigating 3D NAND Flash Read Disturb Reliability With Extreme Value Analysis

inferred← citeshttps://doi.org/10.1109/tdmr.2023.3280262openalex-snapshot

Lightweight Read Reference Voltage Calibration Strategy for Improving 3-D TLC NAND Flash Memory Reliability

inferred← citeshttps://doi.org/10.1109/tdmr.2024.3453329openalex-snapshot

An Efficient Dynamic Threshold Voltage Detection Scheme for Improving 3-D NAND Flash Reliability

inferred← citeshttps://doi.org/10.1109/tdmr.2025.3633900openalex-snapshot

Reliability Correlation Coefficient of Fail Bit Counts of Flash Memory

inferred← citeshttps://doi.org/10.1109/ted.2016.2593913openalex-snapshot

Modeling of Threshold Voltage Distribution in NAND Flash Memory: A Monte Carlo Method

inferred← citeshttps://doi.org/10.1109/ted.2020.3030867openalex-snapshot

Exploiting Error Characteristic to Optimize Read Voltage for 3-D NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/ted.2024.3350000openalex-snapshot

Reliability Improvement in Vertical NAND Flash Cells Using Adaptive Incremental Step Pulse Programming (A-ISPP) and Incremental Step Pulse Erasing (ISPE)

inferred← citeshttps://doi.org/10.1109/ted.2024.3392170openalex-snapshot

On-Chip Learning in Vertical NAND Flash Memory Using Forward–Forward Algorithm

inferred← citeshttps://doi.org/10.1109/ted.2025.3602378openalex-snapshot

Comparative Analysis of Grain Boundary Effects in FET-Type and Diode-Type 3-D nand flash memory

inferred← citeshttps://doi.org/10.1109/tit.2018.2870437openalex-snapshot

A Combinatorial Methodology for Optimizing Non-Binary Graph-Based Codes: Theoretical Analysis and Applications in Data Storage

inferred← citeshttps://doi.org/10.1109/tns.2015.2490019openalex-snapshot

Interrupted PROGRAM and ERASE Operations for Characterizing Radiation Effects in Commercial NAND Flash Memories

inferred← citeshttps://doi.org/10.1109/tsp.2013.2295056openalex-snapshot

Decision Directed Estimation of Threshold Voltage Distribution in NAND Flash Memory

inferred← citeshttps://doi.org/10.1109/tvlsi.2015.2479250openalex-snapshot

PEVA: A Page Endurance Variance Aware Strategy for the Lifetime Extension of NAND Flash

inferred← citeshttps://doi.org/10.1109/tvlsi.2016.2523759openalex-snapshot

Detector for MLC NAND Flash Memory Using Neighbor-A-Priori Information

inferred← citeshttps://doi.org/10.1109/tvlsi.2016.2537846openalex-snapshot

Fixation Ratio of Error Location-Aware Strategy for Increased Reliable Retention Time of Flash Memory

inferred← citeshttps://doi.org/10.1109/tvlsi.2018.2882194openalex-snapshot

Three-Dimensional nand Flash for Vector–Matrix Multiplication

inferred← citeshttps://doi.org/10.1109/tvlsi.2019.2912228openalex-snapshot

Interpage-Based Endurance-Enhancing Lower State Encoding for MLC and TLC Flash Memory Storages

inferred← citeshttps://doi.org/10.1109/wisee.2018.8637339openalex-snapshot

Wireless Passive Radiation Dosimeter Using Flash Memory

inferred← citeshttps://doi.org/10.1145/2669365openalex-snapshot

Efficient Data Mapping and Buffering Techniques for Multilevel Cell Phase-Change Memories

inferred← citeshttps://doi.org/10.1145/3079856.3080242openalex-snapshot

The Reach Profiler (REAPER)

inferred← citeshttps://doi.org/10.1145/3140659.3080242openalex-snapshot

The Reach Profiler (REAPER)

inferred← citeshttps://doi.org/10.1145/3224432openalex-snapshot

Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation

inferred← citeshttps://doi.org/10.1145/3316482.3326359openalex-snapshot

1+1>2: variation-aware lifetime enhancement for embedded 3D NAND flash systems

inferred← citeshttps://doi.org/10.1145/3316781.3317778openalex-snapshot

ASCache

inferred← citeshttps://doi.org/10.1145/3373376.3378490openalex-snapshot

Evanesco

inferred← citeshttps://doi.org/10.1145/3445814.3446719openalex-snapshot

Reducing solid-state drive read latency by optimizing read-retry

inferred← citeshttps://doi.org/10.1145/3491230openalex-snapshot

Characterization Summary of Performance, Reliability, and Threshold Voltage Distribution of 3D Charge-Trap NAND Flash Memory

inferred← citeshttps://doi.org/10.1145/3620666.3651341openalex-snapshot

AERO: Adaptive Erase Operation for Improving Lifetime and Performance of Modern NAND Flash-Based SSDs

inferred← citeshttps://doi.org/10.1145/3627915.3628024openalex-snapshot

Flash-Based Solid-State Storage Reduces LDPC Read Retry Scheme

inferred← citeshttps://doi.org/10.1145/3779212.3790228openalex-snapshot

STRAW: Stress-Aware WL-Based Read Disturbance Management for High-Density NAND Flash Memory

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